From: Aapo Vienamo <avienamo@nvidia.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Mikko Perttunen <mperttunen@nvidia.com>
Cc: <linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Aapo Vienamo <avienamo@nvidia.com>
Subject: [PATCH v2 8/8] arm64: dts: tegra210: Enable HS400
Date: Fri, 10 Aug 2018 21:14:05 +0300 [thread overview]
Message-ID: <1533924845-1466-9-git-send-email-avienamo@nvidia.com> (raw)
In-Reply-To: <1533924845-1466-1-git-send-email-avienamo@nvidia.com>
Enable HS400 signaling on Tegra210 SDMMC4 controller.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index f8e5f09..8fe47d6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1116,6 +1116,7 @@
<&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
nvidia,dqs-trim = <40>;
+ mmc-hs400-1_8v;
status = "disabled";
};
--
2.7.4
next prev parent reply other threads:[~2018-08-10 18:14 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-10 18:13 [PATCH v2 0/8] Tegra SDHCI support HS400 on Tegra210 and Tegra186 Aapo Vienamo
2018-08-10 18:13 ` [PATCH v2 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI Aapo Vienamo
2018-08-13 19:26 ` Rob Herring
2018-08-10 18:13 ` [PATCH v2 2/8] mmc: tegra: Parse and program DQS trim value Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 3/8] mmc: tegra: Implement HS400 enhanced strobe Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 4/8] mmc: tegra: Implement HS400 delay line calibration Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 6/8] arm64: dts: tegra210: " Aapo Vienamo
2018-08-10 18:14 ` [PATCH v2 7/8] arm64: dts: tegra186: Enable HS400 Aapo Vienamo
2018-08-10 18:14 ` Aapo Vienamo [this message]
2018-08-24 9:11 ` [PATCH v2 0/8] Tegra SDHCI support HS400 on Tegra210 and Tegra186 Thierry Reding
2018-08-27 9:50 ` Ulf Hansson
2018-08-27 10:08 ` Thierry Reding
2018-08-27 10:26 ` Adrian Hunter
2018-08-27 11:47 ` Adrian Hunter
2018-08-31 14:02 ` Thierry Reding
2018-09-03 6:14 ` Ulf Hansson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1533924845-1466-9-git-send-email-avienamo@nvidia.com \
--to=avienamo@nvidia.com \
--cc=adrian.hunter@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mperttunen@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).