From: Will Deacon <will.deacon@arm.com>
To: linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, benh@au1.ibm.com,
torvalds@linux-foundation.org, npiggin@gmail.com,
catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org,
Will Deacon <will.deacon@arm.com>
Subject: [PATCH 05/12] arm64: tlbflush: Allow stride to be specified for __flush_tlb_range()
Date: Thu, 30 Aug 2018 17:15:39 +0100 [thread overview]
Message-ID: <1535645747-9823-6-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1535645747-9823-1-git-send-email-will.deacon@arm.com>
When we are unmapping intermediate page-table entries or huge pages, we
don't need to issue a TLBI instruction for every PAGE_SIZE chunk in the
VA range being unmapped.
Allow the invalidation stride to be passed to __flush_tlb_range(), and
adjust our "just nuke the ASID" heuristic to take this into account.
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
arch/arm64/include/asm/tlb.h | 2 +-
arch/arm64/include/asm/tlbflush.h | 15 +++++++++------
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index a3233167be60..1e1f68ce28f4 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -53,7 +53,7 @@ static inline void tlb_flush(struct mmu_gather *tlb)
* the __(pte|pmd|pud)_free_tlb() functions, so last level
* TLBI is sufficient here.
*/
- __flush_tlb_range(&vma, tlb->start, tlb->end, true);
+ __flush_tlb_range(&vma, tlb->start, tlb->end, PAGE_SIZE, true);
}
static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index ddbf1718669d..37ccdb246b20 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -149,25 +149,28 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
* This is meant to avoid soft lock-ups on large TLB flushing ranges and not
* necessarily a performance improvement.
*/
-#define MAX_TLB_RANGE (1024UL << PAGE_SHIFT)
+#define MAX_TLBI_OPS 1024UL
static inline void __flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end,
- bool last_level)
+ unsigned long stride, bool last_level)
{
unsigned long asid = ASID(vma->vm_mm);
unsigned long addr;
- if ((end - start) > MAX_TLB_RANGE) {
+ if ((end - start) > (MAX_TLBI_OPS * stride)) {
flush_tlb_mm(vma->vm_mm);
return;
}
+ /* Convert the stride into units of 4k */
+ stride >>= 12;
+
start = __TLBI_VADDR(start, asid);
end = __TLBI_VADDR(end, asid);
dsb(ishst);
- for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) {
+ for (addr = start; addr < end; addr += stride) {
if (last_level) {
__tlbi(vale1is, addr);
__tlbi_user(vale1is, addr);
@@ -186,14 +189,14 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
* We cannot use leaf-only invalidation here, since we may be invalidating
* table entries as part of collapsing hugepages or moving page tables.
*/
- __flush_tlb_range(vma, start, end, false);
+ __flush_tlb_range(vma, start, end, PAGE_SIZE, false);
}
static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
unsigned long addr;
- if ((end - start) > MAX_TLB_RANGE) {
+ if ((end - start) > (MAX_TLBI_OPS * PAGE_SIZE)) {
flush_tlb_all();
return;
}
--
2.1.4
next prev parent reply other threads:[~2018-08-30 16:15 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-30 16:15 [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Will Deacon
2018-08-30 16:15 ` [PATCH 01/12] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() Will Deacon
2018-08-30 16:15 ` [PATCH 02/12] arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() Will Deacon
2018-08-30 16:15 ` [PATCH 03/12] arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() Will Deacon
2018-08-30 16:15 ` [PATCH 04/12] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() Will Deacon
2018-08-30 16:15 ` Will Deacon [this message]
2018-08-30 16:15 ` [PATCH 06/12] arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code Will Deacon
2018-08-30 16:15 ` [PATCH 07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU Will Deacon
2018-08-30 16:15 ` [PATCH 08/12] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather Will Deacon
2018-08-30 16:15 ` [PATCH 09/12] asm-generic/tlb: Track which levels of the page tables have been cleared Will Deacon
2018-08-31 1:23 ` Nicholas Piggin
2018-08-30 16:15 ` [PATCH 10/12] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Will Deacon
2018-08-30 16:15 ` [PATCH 11/12] arm64: tlb: Avoid synchronous TLBIs when freeing page tables Will Deacon
2018-08-30 16:15 ` [PATCH 12/12] arm64: tlb: Rewrite stale comment in asm/tlbflush.h Will Deacon
2018-08-30 16:39 ` [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Linus Torvalds
2018-08-31 1:00 ` Nicholas Piggin
2018-08-31 1:04 ` Linus Torvalds
2018-08-31 9:54 ` Will Deacon
2018-08-31 10:10 ` Peter Zijlstra
2018-08-31 10:32 ` Nicholas Piggin
2018-08-31 10:49 ` Peter Zijlstra
2018-08-31 11:12 ` Will Deacon
2018-08-31 11:20 ` Peter Zijlstra
2018-08-31 11:50 ` Nicholas Piggin
2018-09-03 12:52 ` Will Deacon
2018-08-30 17:11 ` Peter Zijlstra
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