From: Bibby Hsieh <bibby.hsieh@mediatek.com>
To: David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>
Cc: Yingjoe Chen <yingjoe.chen@mediatek.com>,
Cawa Cheng <cawa.cheng@mediatek.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
YT Shen <yt.shen@mediatek.com>,
Thierry Reding <thierry.reding@gmail.com>,
CK Hu <ck.hu@mediatek.com>, Mao Huang <littlecvr@chromium.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
chunhui dai <chunhui.dai@mediatek.com>
Subject: [PATCH v3 04/12] drm/mediatek: add clock factor for different IC
Date: Fri, 21 Sep 2018 11:28:14 +0800 [thread overview]
Message-ID: <20180921032822.30771-5-bibby.hsieh@mediatek.com> (raw)
In-Reply-To: <20180921032822.30771-1-bibby.hsieh@mediatek.com>
From: chunhui dai <chunhui.dai@mediatek.com>
different IC has different clock designed in HDMI, the factor for
calculate clock should be different. Usinng the data in of_node
to find this factor.
Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 24 +++++++++++++++---------
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 1e7369e0d91c..022ccec49cea 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
};
struct mtk_dpi_conf {
+ unsigned int (*cal_factor)(int clock);
u32 reg_h_fre_con;
bool edge_sel_en;
};
@@ -460,15 +461,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
unsigned int factor;
/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
-
- if (mode->clock <= 27000)
- factor = 3 << 4;
- else if (mode->clock <= 84000)
- factor = 3 << 3;
- else if (mode->clock <= 167000)
- factor = 3 << 2;
- else
- factor = 3 << 1;
+ factor = dpi->conf->cal_factor(mode->clock);
drm_display_mode_to_videomode(mode, &vm);
pll_rate = vm.pixelclock * factor;
@@ -682,7 +675,20 @@ static const struct component_ops mtk_dpi_component_ops = {
.unbind = mtk_dpi_unbind,
};
+static unsigned int mt8173_calculate_factor(int clock)
+{
+ if (clock <= 27000)
+ return 3 << 4;
+ else if (clock <= 84000)
+ return 3 << 3;
+ else if (clock <= 167000)
+ return 3 << 2;
+ else
+ return 3 << 1;
+}
+
static const struct mtk_dpi_conf mt8173_conf = {
+ .cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
};
--
2.12.5.2.gbdf23ab
next prev parent reply other threads:[~2018-09-21 3:29 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 3:28 [PATCH v3 00/13] drm/mediatek: support hdmi output for mt2701 and mt7623 Bibby Hsieh
2018-09-21 3:28 ` [PATCH v3 01/12] drm/mediatek: add refcount for DPI power on/off Bibby Hsieh
2018-09-21 6:18 ` CK Hu
2018-09-21 3:28 ` [PATCH v3 02/12] drm/mediatek: move hardware register to node data Bibby Hsieh
2018-09-21 7:39 ` CK Hu
2018-09-21 3:28 ` [PATCH v3 03/12] drm/mediatek: adjust EDGE to match clock and data Bibby Hsieh
2018-09-21 3:28 ` Bibby Hsieh [this message]
2018-09-21 9:03 ` [PATCH v3 04/12] drm/mediatek: add clock factor for different IC CK Hu
2018-09-21 3:28 ` [PATCH v3 05/12] drm/mediatek: convert dpi driver to use drm_of_find_panel_or_bridge Bibby Hsieh
2018-09-21 9:47 ` CK Hu
2018-09-21 3:28 ` [PATCH v3 06/12] drm/mediatek: add dpi driver for mt2701 and mt7623 Bibby Hsieh
2018-09-21 9:50 ` CK Hu
2018-09-21 3:28 ` [PATCH v3 07/12] drm/mediatek: separate hdmi phy to different file Bibby Hsieh
2018-09-21 3:28 ` [PATCH v3 08/12] drm/mediatek: add support for SPDIF audio in HDMI Bibby Hsieh
2018-09-21 3:28 ` [PATCH v3 09/12] drm/mediatek: add hdmi driver for MT2701 and MT7623 Bibby Hsieh
2018-09-21 10:10 ` CK Hu
2018-09-21 3:28 ` [PATCH v3 10/12] drm/mediatek: implement connection from BLS to DPI0 Bibby Hsieh
2018-09-21 3:28 ` [PATCH v3 11/12] drm/mediatek: add a error return value when clock driver has been prepared Bibby Hsieh
2018-09-21 3:28 ` [PATCH v3 12/12] drm/mediatek: config component output by device node port Bibby Hsieh
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