From: Rob Herring <robh@kernel.org>
To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org
Cc: Grant Likely <glikely@secretlab.ca>,
Kumar Gala <kumar.gala@linaro.org>,
Frank Rowand <frowand.list@gmail.com>,
Mark Rutland <mark.rutland@arm.com>,
Linus Walleij <linus.walleij@linaro.org>,
Olof Johansson <olof@lixom.net>, Arnd Bergmann <arnd@arndb.de>,
Mark Brown <broonie@kernel.org>, Tom Rini <trini@konsulko.com>,
Pantelis Antoniou <pantelis.antoniou@konsulko.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Jonathan Cameron <jic23@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Will Deacon <will.deacon@arm.com>
Subject: [PATCH 13/36] dt-bindings: arm: Convert PMU binding to json-schema
Date: Fri, 5 Oct 2018 11:58:25 -0500 [thread overview]
Message-ID: <20181005165848.3474-14-robh@kernel.org> (raw)
In-Reply-To: <20181005165848.3474-1-robh@kernel.org>
Convert ARM PMU binding to DT schema format using json-schema.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
.../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
2 files changed, 96 insertions(+), 70 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
deleted file mode 100644
index 13611a8199bb..000000000000
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ /dev/null
@@ -1,70 +0,0 @@
-* ARM Performance Monitor Units
-
-ARM cores often have a PMU for counting cpu and cache events like cache misses
-and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
-representation in the device tree should be done as under:-
-
-Required properties:
-
-- compatible : should be one of
- "apm,potenza-pmu"
- "arm,armv8-pmuv3"
- "arm,cortex-a73-pmu"
- "arm,cortex-a72-pmu"
- "arm,cortex-a57-pmu"
- "arm,cortex-a53-pmu"
- "arm,cortex-a35-pmu"
- "arm,cortex-a17-pmu"
- "arm,cortex-a15-pmu"
- "arm,cortex-a12-pmu"
- "arm,cortex-a9-pmu"
- "arm,cortex-a8-pmu"
- "arm,cortex-a7-pmu"
- "arm,cortex-a5-pmu"
- "arm,arm11mpcore-pmu"
- "arm,arm1176-pmu"
- "arm,arm1136-pmu"
- "brcm,vulcan-pmu"
- "cavium,thunder-pmu"
- "qcom,scorpion-pmu"
- "qcom,scorpion-mp-pmu"
- "qcom,krait-pmu"
-- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
- interrupt (PPI) then 1 interrupt should be specified.
-
-Optional properties:
-
-- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU
- nodes corresponding directly to the affinity of
- the SPIs listed in the interrupts property.
-
- When using a PPI, specifies a list of phandles to CPU
- nodes corresponding to the set of CPUs which have
- a PMU of this type signalling the PPI listed in the
- interrupts property, unless this is already specified
- by the PPI interrupt specifier itself (in which case
- the interrupt-affinity property shouldn't be present).
-
- This property should be present when there is more than
- a single SPI.
-
-
-- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd
- events.
-
-- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register
- (SDER) is accessible. This will cause the driver to do
- any setup required that is only possible in ARMv7 secure
- state. If not present the ARMv7 SDER will not be touched,
- which means the PMU may fail to operate unless external
- code (bootloader or security monitor) has performed the
- appropriate initialisation. Note that this property is
- not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
- in Non-secure state.
-
-Example:
-
-pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <100 101>;
-};
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml
new file mode 100644
index 000000000000..0dbb9e0566af
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/pmu.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Performance Monitor Units
+
+maintainers:
+ - Mark Rutland <mark.rutland@arm.com>
+ - Will Deacon <will.deacon@arm.com>
+description: |+
+ ARM cores often have a PMU for counting cpu and cache events like cache misses
+ and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
+ representation in the device tree should be done as under:-
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - apm,potenza-pmu
+ - arm,armv8-pmuv3
+ - arm,cortex-a73-pmu
+ - arm,cortex-a72-pmu
+ - arm,cortex-a57-pmu
+ - arm,cortex-a53-pmu
+ - arm,cortex-a35-pmu
+ - arm,cortex-a17-pmu
+ - arm,cortex-a15-pmu
+ - arm,cortex-a12-pmu
+ - arm,cortex-a9-pmu
+ - arm,cortex-a8-pmu
+ - arm,cortex-a7-pmu
+ - arm,cortex-a5-pmu
+ - arm,arm11mpcore-pmu
+ - arm,arm1176-pmu
+ - arm,arm1136-pmu
+ - brcm,vulcan-pmu
+ - cavium,thunder-pmu
+ - qcom,scorpion-pmu
+ - qcom,scorpion-mp-pmu
+ - qcom,krait-pmu
+ interrupts:
+ oneOf:
+ - maxItems: 1
+ - minItems: 2
+ maxItems: 8
+ description: 1 interrupt per core.
+
+ interrupts-extended:
+ $ref: '#/properties/interrupts'
+
+ interrupt-affinity:
+ description:
+ When using SPIs, specifies a list of phandles to CPU
+ nodes corresponding directly to the affinity of
+ the SPIs listed in the interrupts property.
+
+ When using a PPI, specifies a list of phandles to CPU
+ nodes corresponding to the set of CPUs which have
+ a PMU of this type signalling the PPI listed in the
+ interrupts property, unless this is already specified
+ by the PPI interrupt specifier itself (in which case
+ the interrupt-affinity property shouldn't be present).
+
+ This property should be present when there is more than
+ a single SPI.
+
+ qcom,no-pc-write:
+ type: boolean
+ description:
+ Indicates that this PMU doesn't support the 0xc and 0xd events.
+
+ secure-reg-access:
+ type: boolean
+ description:
+ Indicates that the ARMv7 Secure Debug Enable Register
+ (SDER) is accessible. This will cause the driver to do
+ any setup required that is only possible in ARMv7 secure
+ state. If not present the ARMv7 SDER will not be touched,
+ which means the PMU may fail to operate unless external
+ code (bootloader or security monitor) has performed the
+ appropriate initialisation. Note that this property is
+ not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
+ in Non-secure state.
+
+required:
+ - compatible
+
+oneOf:
+ - required:
+ - interrupts
+ - required:
+ - interrupts-extended
+
+...
--
2.17.1
next prev parent reply other threads:[~2018-10-05 17:01 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-05 16:58 [PATCH 00/36] Devicetree schema Rob Herring
2018-10-05 16:58 ` [PATCH 01/36] dt-bindings: arm: alpine: Move CPU control related binding to cpu-enable-method/al,alpine-smp Rob Herring
2018-10-05 16:58 ` [PATCH 02/36] dt-bindings: arm: amlogic: Move 'amlogic,meson-gx-ao-secure' binding to its own file Rob Herring
2018-10-05 16:58 ` [PATCH 03/36] dt-bindings: arm: atmel: Move various sys registers out of SoC binding doc Rob Herring
2018-10-05 16:58 ` [PATCH 04/36] dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docs Rob Herring
2018-10-08 6:25 ` Shawn Guo
2018-10-05 16:58 ` [PATCH 05/36] dt-bindings: arm: renesas: Move 'renesas,prr' binding to its own doc Rob Herring
2018-10-08 7:05 ` Geert Uytterhoeven
2018-10-08 14:59 ` Rob Herring
2018-10-18 13:04 ` Simon Horman
2018-10-05 16:58 ` [PATCH 06/36] dt-bindings: arm: zte: Move sysctrl bindings to their " Rob Herring
2018-10-08 6:30 ` Shawn Guo
2018-10-05 16:58 ` [PATCH 07/36] kbuild: Add support for DT binding schema checks Rob Herring
2018-10-05 16:58 ` [PATCH 08/36] dt-bindings: Add a writing DT schemas how-to and annotated example Rob Herring
2018-10-05 16:58 ` [PATCH 09/36] dt-bindings: Convert trivial-devices.txt to json-schema Rob Herring
2018-10-05 16:58 ` [PATCH 10/36] dt-bindings: altera: Convert clkmgr binding " Rob Herring
2018-10-05 16:58 ` [PATCH 11/36] dt-bindings: timer: Convert ARM timer bindings " Rob Herring
2018-10-05 16:58 ` [PATCH 12/36] dt-bindings: arm: Convert cpu binding " Rob Herring
2018-11-08 8:48 ` Michal Simek
2018-11-30 18:00 ` Rob Herring
2018-12-03 12:40 ` Will Deacon
2018-12-03 14:24 ` Rob Herring
2018-10-05 16:58 ` Rob Herring [this message]
2018-10-09 11:57 ` [PATCH 13/36] dt-bindings: arm: Convert PMU " Will Deacon
2018-10-09 18:14 ` Rob Herring
2018-10-10 16:50 ` Will Deacon
2018-10-10 18:51 ` Rob Herring
2018-10-19 10:34 ` Will Deacon
2018-11-01 19:32 ` Rob Herring
2018-11-08 15:54 ` Robin Murphy
2018-11-08 15:59 ` Thomas Petazzoni
2018-11-08 16:10 ` Robin Murphy
2018-10-05 16:58 ` [PATCH 14/36] dt-bindings: arm: Convert primecell " Rob Herring
2018-10-05 16:58 ` [PATCH 15/36] dt-bindings: arm: Convert Actions Semi bindings to jsonschema Rob Herring
2018-10-06 10:40 ` Andreas Färber
2018-10-07 20:11 ` Rob Herring
2018-10-10 1:41 ` Joe Perches
2018-10-05 16:58 ` [PATCH 16/36] dt-bindings: arm: Convert Alpine board/soc bindings to json-schema Rob Herring
2018-10-05 16:58 ` [PATCH 17/36] dt-bindings: arm: Convert Altera " Rob Herring
2018-10-05 16:58 ` [PATCH 18/36] dt-bindings: arm: Convert Amlogic " Rob Herring
2018-10-05 16:58 ` [PATCH 19/36] dt-bindings: arm: Convert Atmel " Rob Herring
2018-10-05 18:07 ` Alexandre Belloni
2018-10-05 18:32 ` Rob Herring
2018-10-05 16:58 ` [PATCH 20/36] dt-bindings: arm: Convert Calxeda " Rob Herring
2018-10-05 16:58 ` [PATCH 21/36] dt-bindings: arm: Convert TI davinci " Rob Herring
2018-10-09 11:59 ` Sekhar Nori
2018-10-05 16:58 ` [PATCH 22/36] dt-bindings: arm: Convert FSL " Rob Herring
2018-10-08 7:01 ` Shawn Guo
2018-10-08 13:30 ` Rob Herring
2018-10-05 16:58 ` [PATCH 23/36] dt-bindings: arm: Convert MediaTek " Rob Herring
2018-10-05 16:58 ` [PATCH 24/36] dt-bindings: arm: Convert TI nspire " Rob Herring
2018-10-05 16:58 ` [PATCH 25/36] dt-bindings: arm: Convert Oxford Semi " Rob Herring
2018-10-05 16:58 ` [PATCH 26/36] dt-bindings: arm: Convert QCom " Rob Herring
2018-10-05 16:58 ` [PATCH 27/36] dt-bindings: arm: Convert Realtek " Rob Herring
2018-10-06 10:54 ` Andreas Färber
2018-10-07 19:20 ` Rob Herring
2018-10-05 16:58 ` [PATCH 28/36] dt-bindings: arm: Convert Rockchip " Rob Herring
2018-10-08 9:45 ` Heiko Stuebner
2018-10-08 13:46 ` Rob Herring
2018-10-05 16:58 ` [PATCH 29/36] dt-bindings: arm: Convert Renesas " Rob Herring
2018-10-08 7:47 ` Geert Uytterhoeven
2018-10-08 14:57 ` Rob Herring
2018-10-08 15:12 ` Geert Uytterhoeven
2018-10-08 16:54 ` Rob Herring
2018-10-08 8:02 ` Simon Horman
2018-10-08 14:05 ` Rob Herring
2018-10-18 13:01 ` Simon Horman
2018-10-05 16:58 ` [PATCH 30/36] dt-bindings: arm: Convert CSR SiRF " Rob Herring
2018-10-05 16:58 ` [PATCH 31/36] dt-bindings: arm: Convert SPEAr " Rob Herring
2018-10-05 16:58 ` [PATCH 32/36] dt-bindings: arm: Convert ST STi " Rob Herring
2018-10-10 9:19 ` Patrice CHOTARD
2018-10-05 16:58 ` [PATCH 33/36] dt-bindings: arm: Convert Tegra " Rob Herring
2018-10-05 22:19 ` Marcel Ziswiler
2018-10-05 23:36 ` Rob Herring
2018-10-05 16:58 ` [PATCH 34/36] dt-bindings: arm: Convert VIA " Rob Herring
2018-10-05 16:58 ` [PATCH 35/36] dt-bindings: arm: Convert Xilinx " Rob Herring
2018-11-08 13:34 ` Michal Simek
2018-10-05 16:58 ` [PATCH 36/36] dt-bindings: arm: Convert ZTE " Rob Herring
2018-10-08 7:16 ` Shawn Guo
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