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From: "Moger, Babu" <Babu.Moger@amd.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
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Cc: "x86@kernel.org" <x86@kernel.org>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"Moger, Babu" <Babu.Moger@amd.com>,
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Subject: [PATCH v3 10/11] arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array
Date: Thu, 11 Oct 2018 20:33:39 +0000	[thread overview]
Message-ID: <20181011203223.18157-11-babu.moger@amd.com> (raw)
In-Reply-To: <20181011203223.18157-1-babu.moger@amd.com>

From: Sherry Hurwitz <sherry.hurwitz@amd.com>

The feature bit X86_FEATURE_MBA is detected via CPUID leaf 0x80000008
EBX Bit 06. This bit indicates the support of AMD's MBA feature.

This feature is supported by both Intel and AMD. But they are detected
different CPUID leaves.

Signed-off-by: Sherry Hurwitz <sherry.hurwitz@amd.com>
Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/scattered.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 772c219b6889..bd7853334b27 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -17,7 +17,11 @@ struct cpuid_bit {
 	u32 sub_leaf;
 };
 
-/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
+/*
+ * Please keep the leaf sorted by cpuid_bit.level for faster search.
+ * X86_FEATURE_MBA supported by both Intel and AMD. But the cpuid
+ * levels are different. Add a separate enty for each.
+ */
 static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
 	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
@@ -29,6 +33,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
 	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
+	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
 	{ X86_FEATURE_SME,		CPUID_EAX,  0, 0x8000001f, 0 },
 	{ X86_FEATURE_SEV,		CPUID_EAX,  1, 0x8000001f, 0 },
 	{ 0, 0, 0, 0, 0 }
-- 
2.17.1


  parent reply	other threads:[~2018-10-11 20:34 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-11 20:32 [PATCH v3 00/11] arch/x86: AMD QoS support Moger, Babu
2018-10-11 20:33 ` [PATCH v3 01/11] arch/x86: Start renaming the rdt files to more generic names Moger, Babu
2018-10-12 19:07   ` Reinette Chatre
2018-10-12 20:11     ` Moger, Babu
2018-10-11 20:33 ` [PATCH v3 02/11] arch/x86: Rename the RDT functions and definitions Moger, Babu
2018-10-12 19:40   ` Reinette Chatre
2018-10-12 20:12     ` Moger, Babu
2018-10-11 20:33 ` [PATCH v3 03/11] arch/x86: Re-arrange RDT init code Moger, Babu
2018-10-11 20:33 ` [PATCH v3 04/11] arch/x86: Bring all the macros to resctrl.h Moger, Babu
2018-10-11 20:33 ` [PATCH v3 05/11] arch/x86: Introduce a new config parameter RESCTRL Moger, Babu
2018-10-11 20:33 ` [PATCH v3 06/11] arch/x86: Use new config parameter RESCTRL for compilation Moger, Babu
2018-10-11 20:33 ` [PATCH v3 07/11] arch/x86: Initialize the resource functions that are different Moger, Babu
2018-10-11 20:33 ` [PATCH v3 08/11] arch/x86: Bring few more functions into the resource structure Moger, Babu
2018-10-11 20:33 ` [PATCH v3 09/11] arch/x86: Introduce new config parameter AMD_QOS Moger, Babu
2018-10-11 22:02   ` Borislav Petkov
2018-10-12 14:40     ` Moger, Babu
2018-10-12 14:43       ` Borislav Petkov
2018-10-12 18:32         ` Moger, Babu
2018-10-11 20:33 ` Moger, Babu [this message]
2018-10-11 20:33 ` [PATCH v3 11/11] arch/x86: Introduce QOS feature for AMD Moger, Babu

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