* [PATCH v2 1/3] arm64: dts: qcom: sm8150: add other QUP nodes and iommus
@ 2021-04-08 16:21 Caleb Connolly
0 siblings, 0 replies; 2+ messages in thread
From: Caleb Connolly @ 2021-04-08 16:21 UTC (permalink / raw)
To: caleb, Andy Gross, Bjorn Andersson, Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
Add the first and third qupv3 nodes used to hook
up peripherals on some devices, as well as the iommus properties for all
of them.
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index e5bb17bc2f46..543417d74216 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -577,12 +577,26 @@ gcc: clock-controller@100000 {
<&sleep_clk>;
};
+ qupv3_id_0: geniqup@8c0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x0 0x008c0000 0x0 0x6000>;
+ clock-names = "m-ahb", "s-ahb";
+ clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+ iommus = <&apps_smmu 0xc3 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+ };
+
qupv3_id_1: geniqup@ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x00ac0000 0x0 0x6000>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x603 0x0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -598,6 +612,20 @@ uart2: serial@a90000 {
};
};
+ qupv3_id_2: geniqup@cc0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x0 0x00cc0000 0x0 0x6000>;
+
+ clock-names = "m-ahb", "s-ahb";
+ clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x7a3 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+ };
+
config_noc: interconnect@1500000 {
compatible = "qcom,sm8150-config-noc";
reg = <0 0x01500000 0 0x7400>;
--
2.30.2
^ permalink raw reply related [flat|nested] 2+ messages in thread* (No Subject)
@ 2021-03-21 17:46 Caleb Connolly
2021-03-21 17:46 ` [PATCH v2 1/3] arm64: dts: qcom: sm8150: add other QUP nodes and iommus Caleb Connolly
0 siblings, 1 reply; 2+ messages in thread
From: Caleb Connolly @ 2021-03-21 17:46 UTC (permalink / raw)
To: caleb; +Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm
Subject: v2: arm64: dts: sm8150: start populating qups
The QUPs are rather sparse, lets add the zero-th and second qup nodes,
the iommus properties for all of them and the i2c nodes.
With this it's now possible to bringup the touchscreen on my
device, and without crashing!
Derived from OnePlus 7 Pro downstream kernel sources.
Caleb
---
Of note, I'm only able to properly test i2c17, as that's what my
touchscreen is attached to. Enabling i2c18 causes my device to lockup
during probe, I suspect those pins are used for some other purpose on my
device.
Changes since v1:
* Pick up Reviewed-By's from Vinod and Bhupesh
* Squash second patch into first
* Add iommus property to dt-binding docs for geni
* Fix i2c19 being mistakenly enabled by default
Caleb Connolly (3):
arm64: dts: qcom: sm8150: add other QUP nodes and iommus
arm64: dts: qcom: sm8150: add i2c nodes
dt-bindings: qcom: geni-se: document iommus
arch/arm64/boot/dts/qcom/sm8150.dtsi | 549 +++++++++++++++++++++++++++++++++++
1 file changed, 549 insertions(+)
^ permalink raw reply [flat|nested] 2+ messages in thread* [PATCH v2 1/3] arm64: dts: qcom: sm8150: add other QUP nodes and iommus
2021-03-21 17:46 (No Subject) Caleb Connolly
@ 2021-03-21 17:46 ` Caleb Connolly
0 siblings, 0 replies; 2+ messages in thread
From: Caleb Connolly @ 2021-03-21 17:46 UTC (permalink / raw)
To: caleb, Andy Gross, Bjorn Andersson, Rob Herring
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm,
devicetree, linux-kernel
Add the first and third qupv3 nodes used to hook
up peripherals on some devices, as well as the iommus properties for all
of them.
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index e5bb17bc2f46..543417d74216 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -577,12 +577,26 @@ gcc: clock-controller@100000 {
<&sleep_clk>;
};
+ qupv3_id_0: geniqup@8c0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x0 0x008c0000 0x0 0x6000>;
+ clock-names = "m-ahb", "s-ahb";
+ clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+ iommus = <&apps_smmu 0xc3 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+ };
+
qupv3_id_1: geniqup@ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x00ac0000 0x0 0x6000>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x603 0x0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -598,6 +612,20 @@ uart2: serial@a90000 {
};
};
+ qupv3_id_2: geniqup@cc0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x0 0x00cc0000 0x0 0x6000>;
+
+ clock-names = "m-ahb", "s-ahb";
+ clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x7a3 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+ };
+
config_noc: interconnect@1500000 {
compatible = "qcom,sm8150-config-noc";
reg = <0 0x01500000 0 0x7400>;
--
2.30.2
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2021-03-21 17:46 (No Subject) Caleb Connolly
2021-03-21 17:46 ` [PATCH v2 1/3] arm64: dts: qcom: sm8150: add other QUP nodes and iommus Caleb Connolly
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