[PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Marijn Suijten]

All DSI PHY/PLL drivers were referencing their VCO parent clock by a
global name, most of which don't exist or have been renamed.  These
clock drivers seem to function fine without that except the 14nm driver
for sdm6xx [1].

At the same time all DTs provide a "ref" clock as per the requirements
of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
that clock to use without relying on a global clock name, so that all
dependencies are explicitly defined in DT (the firmware) in the end.

[1]: https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/

Changes since v2:
  - Added Stephen's a-b and Angelo's r-bs;
  - Added .name fallback in msm8974's dsi_phy_28nm for a more graceful
    transition period;
  - Documented possible breakage in 1/2 if firmware isn't updated in
    parallel with the kernel.

Changes since v1:
  - Dropped "arm: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL
    reference" which has made its way into 5.15-fixes in advance of this
    patchset landing in 5.16;
  - Added Fixes: tags for commits that added missing "ref" clocks to DT
    while this firmware clock was never used (until this patchset);
  - Documented missing/wrong and later-added clocks (by aforementioned
    patches) in patch 1/2 more clearly.

Marijn Suijten (2):
  drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parent
  clk: qcom: gcc-sdm660: Remove transient global "xo" clock

 drivers/clk/qcom/gcc-sdm660.c                   | 14 --------------
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c      |  4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c      |  4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c      |  4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c |  4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c       |  4 +++-
 6 files changed, 15 insertions(+), 19 deletions(-)

--
2.33.0

[PATCH v3 1/2] drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parent

[Marijn Suijten]

All DSI PHY/PLL drivers were referencing their VCO parent clock by a
global name, most of which don't exist or have been renamed.  These
clock drivers seem to function fine without that except the 14nm driver
for sdm6xx [1].

At the same time all DTs provide a "ref" clock as per the requirements
of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
that clock to use without relying on a global clock name, so that all
dependencies are explicitly defined in DT (the firmware) in the end.

Note that this patch intentionally breaks older firmware (DT) that
relies on the clock to be found globally instead.  The only affected
platform is msm8974 [2] for whose dsi_phy_28nm a .name="xo" fallback is
left in place to accommodate a more graceful transition period.  All
other platforms had the "ref" clock added to their phy node since its
inception, or in a followup patch some time after.  These patches
wrongly assumed that the "ref" clock was actively used and have hence
been listed as "Fixes:" below.
Furthermore apq8064 was providing the wrong 19.2MHz cxo instead of
27MHz pxo clock, which has been addressed in [3].

It is expected that both [2] and [3] are applied to the tree well in
advance of this patch such that any actual breakage is extremely
unlikely, but might still occur if kernel upgrades are performed without
the DT to match.  After some time the fallback for msm8974 can be
removed again as well.

[1]: https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/
[2]: https://lore.kernel.org/linux-arm-msm/20210830175739.143401-1-marijn.suijten@somainline.org/
[3]: https://lore.kernel.org/linux-arm-msm/20210829203027.276143-2-marijn.suijten@somainline.org/

Fixes: 79e51645a1dd ("arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY")
Fixes: 6969d1d9c615 ("ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY")
Fixes: 0c0e72705a33 ("arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c      | 4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c      | 4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c      | 4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 4 +++-
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c       | 4 +++-
 5 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
index e46b10fc793a..3cbb1f1475e8 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
@@ -562,7 +562,9 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm, struct clk_hw **prov
 	char clk_name[32], parent[32], vco_name[32];
 	char parent2[32], parent3[32], parent4[32];
 	struct clk_init_data vco_init = {
-		.parent_names = (const char *[]){ "xo" },
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "ref",
+		},
 		.num_parents = 1,
 		.name = vco_name,
 		.flags = CLK_IGNORE_UNUSED,
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
index ebedbb6c8961..789b08c24d25 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
@@ -802,7 +802,9 @@ static int pll_14nm_register(struct dsi_pll_14nm *pll_14nm, struct clk_hw **prov
 {
 	char clk_name[32], parent[32], vco_name[32];
 	struct clk_init_data vco_init = {
-		.parent_names = (const char *[]){ "xo" },
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "ref",
+		},
 		.num_parents = 1,
 		.name = vco_name,
 		.flags = CLK_IGNORE_UNUSED,
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
index eb1b8ff61da1..531c4b65aede 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
@@ -521,7 +521,9 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **prov
 {
 	char clk_name[32], parent1[32], parent2[32], vco_name[32];
 	struct clk_init_data vco_init = {
-		.parent_names = (const char *[]){ "xo" },
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "ref", .name = "xo",
+		},
 		.num_parents = 1,
 		.name = vco_name,
 		.flags = CLK_IGNORE_UNUSED,
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
index aaa37456f4ee..9662cb236468 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
@@ -385,7 +385,9 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **prov
 {
 	char *clk_name, *parent_name, *vco_name;
 	struct clk_init_data vco_init = {
-		.parent_names = (const char *[]){ "pxo" },
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "ref",
+		},
 		.num_parents = 1,
 		.flags = CLK_IGNORE_UNUSED,
 		.ops = &clk_ops_dsi_pll_28nm_vco,
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
index 9eade6d81a54..1a5abbd9fb76 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
@@ -588,7 +588,9 @@ static int pll_7nm_register(struct dsi_pll_7nm *pll_7nm, struct clk_hw **provide
 	char clk_name[32], parent[32], vco_name[32];
 	char parent2[32], parent3[32], parent4[32];
 	struct clk_init_data vco_init = {
-		.parent_names = (const char *[]){ "bi_tcxo" },
+		.parent_data = &(const struct clk_parent_data) {
+			.fw_name = "ref",
+		},
 		.num_parents = 1,
 		.name = vco_name,
 		.flags = CLK_IGNORE_UNUSED,
--
2.33.0

[PATCH v3 2/2] clk: qcom: gcc-sdm660: Remove transient global "xo" clock

[Marijn Suijten]

The DSI PHY/PLL was relying on a global "xo" clock to be found, but the
real clock is named "xo_board" in the DT.  The standard nowadays is to
never use global clock names anymore but require the firmware (DT) to
provide every clock binding explicitly with .fw_name.  The DSI PLLs have
since been converted to this mechanism (specifically 14nm for SDM660)
and this transient clock can now be removed.

This issue was originally discovered in:
https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/
and prevented the removal of "xo" at that time.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/qcom/gcc-sdm660.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index 7fb5adf7fa01..429d12193146 100644
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -37,19 +37,6 @@ enum {
 	P_GPLL1_EARLY_DIV,
 };
 
-static struct clk_fixed_factor xo = {
-	.mult = 1,
-	.div = 1,
-	.hw.init = &(struct clk_init_data){
-		.name = "xo",
-		.parent_data = &(const struct clk_parent_data) {
-			.fw_name = "xo"
-		},
-		.num_parents = 1,
-		.ops = &clk_fixed_factor_ops,
-	},
-};
-
 static struct clk_alpha_pll gpll0_early = {
 	.offset = 0x0,
 	.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
@@ -2280,7 +2267,6 @@ static struct gdsc pcie_0_gdsc = {
 };
 
 static struct clk_hw *gcc_sdm660_hws[] = {
-	&xo.hw,
 	&gpll0_early_div.hw,
 	&gpll1_early_div.hw,
 };
-- 
2.33.0

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Stephen Boyd]

Quoting Marijn Suijten (2021-09-11 06:19:19)
> All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> global name, most of which don't exist or have been renamed.  These
> clock drivers seem to function fine without that except the 14nm driver
> for sdm6xx [1].
> 
> At the same time all DTs provide a "ref" clock as per the requirements
> of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> that clock to use without relying on a global clock name, so that all
> dependencies are explicitly defined in DT (the firmware) in the end.

I can take this through clk tree if it helps avoid conflicts. There are
some other patches to sdm660.c in the clk tree already.

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Marijn Suijten]

On 2021-09-14 14:44:01, Stephen Boyd wrote:
> Quoting Marijn Suijten (2021-09-11 06:19:19)
> > All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> > global name, most of which don't exist or have been renamed.  These
> > clock drivers seem to function fine without that except the 14nm driver
> > for sdm6xx [1].
> > 
> > At the same time all DTs provide a "ref" clock as per the requirements
> > of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> > that clock to use without relying on a global clock name, so that all
> > dependencies are explicitly defined in DT (the firmware) in the end.
> 
> I can take this through clk tree if it helps avoid conflicts. There are
> some other patches to sdm660.c in the clk tree already.

Might be useful to maintain proper ordering of these dependent patches
but it's up to Dmitry and Rob to decide, whom I'm sending this mail
directly to so that they can chime in.

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Marijn Suijten]

Hi all,

On 2021-09-18 16:40:38, Marijn Suijten wrote:
> On 2021-09-14 14:44:01, Stephen Boyd wrote:
> > Quoting Marijn Suijten (2021-09-11 06:19:19)
> > > All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> > > global name, most of which don't exist or have been renamed.  These
> > > clock drivers seem to function fine without that except the 14nm driver
> > > for sdm6xx [1].
> > > 
> > > At the same time all DTs provide a "ref" clock as per the requirements
> > > of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> > > that clock to use without relying on a global clock name, so that all
> > > dependencies are explicitly defined in DT (the firmware) in the end.
> > 
> > I can take this through clk tree if it helps avoid conflicts. There are
> > some other patches to sdm660.c in the clk tree already.
> 
> Might be useful to maintain proper ordering of these dependent patches
> but it's up to Dmitry and Rob to decide, whom I'm sending this mail
> directly to so that they can chime in.

Dependent patch [3] landed in 5.15 and [2] made it into 5.16 rc's - is
it time to pick this series up and if so through what tree?

Repeating the links from patch 1/2:
[2]: https://lore.kernel.org/linux-arm-msm/20210830175739.143401-1-marijn.suijten@somainline.org/
[3]: https://lore.kernel.org/linux-arm-msm/20210829203027.276143-2-marijn.suijten@somainline.org/

Thanks!

- marijn

Re: [PATCH v3 1/2] drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parent

[Dmitry Baryshkov]

On 11/09/2021 16:19, Marijn Suijten wrote:
> All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> global name, most of which don't exist or have been renamed.  These
> clock drivers seem to function fine without that except the 14nm driver
> for sdm6xx [1].
> 
> At the same time all DTs provide a "ref" clock as per the requirements
> of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> that clock to use without relying on a global clock name, so that all
> dependencies are explicitly defined in DT (the firmware) in the end.
> 
> Note that this patch intentionally breaks older firmware (DT) that
> relies on the clock to be found globally instead.  The only affected
> platform is msm8974 [2] for whose dsi_phy_28nm a .name="xo" fallback is
> left in place to accommodate a more graceful transition period.  All
> other platforms had the "ref" clock added to their phy node since its
> inception, or in a followup patch some time after.  These patches
> wrongly assumed that the "ref" clock was actively used and have hence
> been listed as "Fixes:" below.
> Furthermore apq8064 was providing the wrong 19.2MHz cxo instead of
> 27MHz pxo clock, which has been addressed in [3].
> 
> It is expected that both [2] and [3] are applied to the tree well in
> advance of this patch such that any actual breakage is extremely
> unlikely, but might still occur if kernel upgrades are performed without
> the DT to match.  After some time the fallback for msm8974 can be
> removed again as well.
> 
> [1]: https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/
> [2]: https://lore.kernel.org/linux-arm-msm/20210830175739.143401-1-marijn.suijten@somainline.org/
> [3]: https://lore.kernel.org/linux-arm-msm/20210829203027.276143-2-marijn.suijten@somainline.org/
> 
> Fixes: 79e51645a1dd ("arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY")
> Fixes: 6969d1d9c615 ("ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY")
> Fixes: 0c0e72705a33 ("arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs")
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
>   drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c      | 4 +++-
>   drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c      | 4 +++-
>   drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c      | 4 +++-
>   drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 4 +++-
>   drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c       | 4 +++-
>   5 files changed, 15 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> index e46b10fc793a..3cbb1f1475e8 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> @@ -562,7 +562,9 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm, struct clk_hw **prov
>   	char clk_name[32], parent[32], vco_name[32];
>   	char parent2[32], parent3[32], parent4[32];
>   	struct clk_init_data vco_init = {
> -		.parent_names = (const char *[]){ "xo" },
> +		.parent_data = &(const struct clk_parent_data) {
> +			.fw_name = "ref",
> +		},
>   		.num_parents = 1,
>   		.name = vco_name,
>   		.flags = CLK_IGNORE_UNUSED,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> index ebedbb6c8961..789b08c24d25 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
> @@ -802,7 +802,9 @@ static int pll_14nm_register(struct dsi_pll_14nm *pll_14nm, struct clk_hw **prov
>   {
>   	char clk_name[32], parent[32], vco_name[32];
>   	struct clk_init_data vco_init = {
> -		.parent_names = (const char *[]){ "xo" },
> +		.parent_data = &(const struct clk_parent_data) {
> +			.fw_name = "ref",
> +		},
>   		.num_parents = 1,
>   		.name = vco_name,
>   		.flags = CLK_IGNORE_UNUSED,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
> index eb1b8ff61da1..531c4b65aede 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
> @@ -521,7 +521,9 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **prov
>   {
>   	char clk_name[32], parent1[32], parent2[32], vco_name[32];
>   	struct clk_init_data vco_init = {
> -		.parent_names = (const char *[]){ "xo" },
> +		.parent_data = &(const struct clk_parent_data) {
> +			.fw_name = "ref", .name = "xo",
> +		},
>   		.num_parents = 1,
>   		.name = vco_name,
>   		.flags = CLK_IGNORE_UNUSED,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
> index aaa37456f4ee..9662cb236468 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c
> @@ -385,7 +385,9 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **prov
>   {
>   	char *clk_name, *parent_name, *vco_name;
>   	struct clk_init_data vco_init = {
> -		.parent_names = (const char *[]){ "pxo" },
> +		.parent_data = &(const struct clk_parent_data) {
> +			.fw_name = "ref",
> +		},
>   		.num_parents = 1,
>   		.flags = CLK_IGNORE_UNUSED,
>   		.ops = &clk_ops_dsi_pll_28nm_vco,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index 9eade6d81a54..1a5abbd9fb76 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -588,7 +588,9 @@ static int pll_7nm_register(struct dsi_pll_7nm *pll_7nm, struct clk_hw **provide
>   	char clk_name[32], parent[32], vco_name[32];
>   	char parent2[32], parent3[32], parent4[32];
>   	struct clk_init_data vco_init = {
> -		.parent_names = (const char *[]){ "bi_tcxo" },
> +		.parent_data = &(const struct clk_parent_data) {
> +			.fw_name = "ref",
> +		},
>   		.num_parents = 1,
>   		.name = vco_name,
>   		.flags = CLK_IGNORE_UNUSED,
> --
> 2.33.0
> 


-- 
With best wishes
Dmitry

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Dmitry Baryshkov]

On 14/12/2021 22:46, Marijn Suijten wrote:
> Hi all,
> 
> On 2021-09-18 16:40:38, Marijn Suijten wrote:
>> On 2021-09-14 14:44:01, Stephen Boyd wrote:
>>> Quoting Marijn Suijten (2021-09-11 06:19:19)
>>>> All DSI PHY/PLL drivers were referencing their VCO parent clock by a
>>>> global name, most of which don't exist or have been renamed.  These
>>>> clock drivers seem to function fine without that except the 14nm driver
>>>> for sdm6xx [1].
>>>>
>>>> At the same time all DTs provide a "ref" clock as per the requirements
>>>> of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
>>>> that clock to use without relying on a global clock name, so that all
>>>> dependencies are explicitly defined in DT (the firmware) in the end.
>>>
>>> I can take this through clk tree if it helps avoid conflicts. There are
>>> some other patches to sdm660.c in the clk tree already.
>>
>> Might be useful to maintain proper ordering of these dependent patches
>> but it's up to Dmitry and Rob to decide, whom I'm sending this mail
>> directly to so that they can chime in.
> 
> Dependent patch [3] landed in 5.15 and [2] made it into 5.16 rc's - is
> it time to pick this series up and if so through what tree?

I'd also second the idea of merging these two patches into 5.17.
Most probably it'd be easier to merge both of them through the clk tree. 
Or we can take the first patch into drm-msm (but then we'd have a 
dependency between msm-next and clk-qcom-next).

Bjorn, Stephen?

> 
> Repeating the links from patch 1/2:
> [2]: https://lore.kernel.org/linux-arm-msm/20210830175739.143401-1-marijn.suijten@somainline.org/
> [3]: https://lore.kernel.org/linux-arm-msm/20210829203027.276143-2-marijn.suijten@somainline.org/
-- 
With best wishes
Dmitry

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Stephen Boyd]

Quoting Dmitry Baryshkov (2021-12-15 12:02:37)
> On 14/12/2021 22:46, Marijn Suijten wrote:
> > Hi all,
> > 
> > On 2021-09-18 16:40:38, Marijn Suijten wrote:
> >> On 2021-09-14 14:44:01, Stephen Boyd wrote:
> >>> Quoting Marijn Suijten (2021-09-11 06:19:19)
> >>>> All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> >>>> global name, most of which don't exist or have been renamed.  These
> >>>> clock drivers seem to function fine without that except the 14nm driver
> >>>> for sdm6xx [1].
> >>>>
> >>>> At the same time all DTs provide a "ref" clock as per the requirements
> >>>> of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> >>>> that clock to use without relying on a global clock name, so that all
> >>>> dependencies are explicitly defined in DT (the firmware) in the end.
> >>>
> >>> I can take this through clk tree if it helps avoid conflicts. There are
> >>> some other patches to sdm660.c in the clk tree already.
> >>
> >> Might be useful to maintain proper ordering of these dependent patches
> >> but it's up to Dmitry and Rob to decide, whom I'm sending this mail
> >> directly to so that they can chime in.
> > 
> > Dependent patch [3] landed in 5.15 and [2] made it into 5.16 rc's - is
> > it time to pick this series up and if so through what tree?
> 
> I'd also second the idea of merging these two patches into 5.17.
> Most probably it'd be easier to merge both of them through the clk tree. 
> Or we can take the first patch into drm-msm (but then we'd have a 
> dependency between msm-next and clk-qcom-next).
> 
> Bjorn, Stephen?
> 

Sounds fine to take through clk tree.

Re: [PATCH v3 0/2] Use "ref" clocks from firmware for DSI PLL VCO parent

[Marijn Suijten]

On 2021-12-15 16:43:45, Stephen Boyd wrote:
> Quoting Dmitry Baryshkov (2021-12-15 12:02:37)
> > On 14/12/2021 22:46, Marijn Suijten wrote:
> > > Hi all,
> > > 
> > > On 2021-09-18 16:40:38, Marijn Suijten wrote:
> > >> On 2021-09-14 14:44:01, Stephen Boyd wrote:
> > >>> Quoting Marijn Suijten (2021-09-11 06:19:19)
> > >>>> All DSI PHY/PLL drivers were referencing their VCO parent clock by a
> > >>>> global name, most of which don't exist or have been renamed.  These
> > >>>> clock drivers seem to function fine without that except the 14nm driver
> > >>>> for sdm6xx [1].
> > >>>>
> > >>>> At the same time all DTs provide a "ref" clock as per the requirements
> > >>>> of dsi-phy-common.yaml, but the clock is never used.  This patchset puts
> > >>>> that clock to use without relying on a global clock name, so that all
> > >>>> dependencies are explicitly defined in DT (the firmware) in the end.
> > >>>
> > >>> I can take this through clk tree if it helps avoid conflicts. There are
> > >>> some other patches to sdm660.c in the clk tree already.
> > >>
> > >> Might be useful to maintain proper ordering of these dependent patches
> > >> but it's up to Dmitry and Rob to decide, whom I'm sending this mail
> > >> directly to so that they can chime in.
> > > 
> > > Dependent patch [3] landed in 5.15 and [2] made it into 5.16 rc's - is
> > > it time to pick this series up and if so through what tree?
> > 
> > I'd also second the idea of merging these two patches into 5.17.
> > Most probably it'd be easier to merge both of them through the clk tree. 
> > Or we can take the first patch into drm-msm (but then we'd have a 
> > dependency between msm-next and clk-qcom-next).
> > 
> > Bjorn, Stephen?
> > 
> 
> Sounds fine to take through clk tree.

Thanks Stephen, would be great to take this in through the clk tree for
5.17.  I don't have anything to add that could possibly warrant a v3,
only msm8996 remains with the "xo" clock but that needs more work in
other drivers and is best dealt with separately.  Please take v2,
assuming there are enough acks/reviews :)

- Marijn