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David Alan Gilbert" , , , , Brijesh Singh Subject: [PATCH v7 24/45] KVM: SVM: Update the SEV-ES save area mapping Date: Wed, 10 Nov 2021 16:07:10 -0600 Message-ID: <20211110220731.2396491-25-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211110220731.2396491-1-brijesh.singh@amd.com> References: <20211110220731.2396491-1-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e04016d0-08a0-468c-14af-08d9a496a387 X-MS-TrafficTypeDiagnostic: MN2PR12MB4797: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JuSoO/X4FzRmwYOzObxHIKNZbtTslYraPeDHE8DM5suqM72pW6r+qmyWsUZyg1cxTJn+oPJOOBhmQlcEp2oEARbjWdHFEyhnF3spxJcc4x4coQnpyGPKEcEwDkSPDX4dCPwGfC582x1GqabiIENoB/2kXkdfvPgdMuax6C7Or6sz/6d3KmzYqzUFtvMeCgry2Ck8rjan1g5hAywwOBL8k+UlnCMd6VfZu9OTJ+OJiWy2+u9YxAvtkZ65SOxQBYZL2hZLvVC3MLmcym2BrwzObH4VLasuGmSUsIyZ16giiqqrq0N9rJ1ekNc/DJV/AUB/J/bki12Ee9WljJxQO4RWHEyRY7HRGAb5pd0005fHY/Lw3b4Azjid9PqjJK0x1wSx7LZPpvKXOamDQE/gWFcJH/EsP0SgHdX5js+l/7B4D7DuqgNXNR3kyi3nHW/F5ME9Ac+E8JaF0Jaf0efrDvUMDcFcSfRTDRVqEPdgSMvuCdD57VoDGKTKtco5KjLKdjCDrAfTDljq1exbqVMGhwkl9WjEwZT7x6FdjPmU3fHkjvhaGEiX1wyzPaAM33VWI1AqIK+/oCzU0gkjqY4QmCQshtvsTAbH3jd3iiEavLpSJcPYwFs2CkzdMc+8QIhfuixB36V1yMkr09Wt8ZyYldsJEVV+zdNznTL4dQIe8m8RkDuFRbEl8SCw6MBYZ2mjyLc3AXy/hKji48nmRoUYqTmGECvZBCTFRknyxMox51XhGT36B/bilZd5gtcckbbM/kcg X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(16526019)(7416002)(186003)(7406005)(82310400003)(36756003)(36860700001)(44832011)(426003)(81166007)(110136005)(316002)(7696005)(83380400001)(336012)(2616005)(86362001)(70586007)(2906002)(356005)(70206006)(8936002)(8676002)(508600001)(15650500001)(1076003)(6666004)(47076005)(5660300002)(4326008)(54906003)(26005)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2021 22:08:34.4075 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e04016d0-08a0-468c-14af-08d9a496a387 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT044.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4797 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org From: Tom Lendacky This is the final step in defining the multiple save areas to keep them separate and ensuring proper operation amongst the different types of guests. Update the SEV-ES/SEV-SNP save area to match the APM. This save area will be used for the upcoming SEV-SNP AP Creation NAE event support. Signed-off-by: Tom Lendacky Signed-off-by: Brijesh Singh --- arch/x86/include/asm/svm.h | 66 +++++++++++++++++++++++++++++--------- 1 file changed, 50 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 5ff1fa364a31..7d90321e7775 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -290,7 +290,13 @@ struct sev_es_save_area { struct vmcb_seg ldtr; struct vmcb_seg idtr; struct vmcb_seg tr; - u8 reserved_1[43]; + u64 vmpl0_ssp; + u64 vmpl1_ssp; + u64 vmpl2_ssp; + u64 vmpl3_ssp; + u64 u_cet; + u8 reserved_1[2]; + u8 vmpl; u8 cpl; u8 reserved_2[4]; u64 efer; @@ -303,9 +309,19 @@ struct sev_es_save_area { u64 dr6; u64 rflags; u64 rip; - u8 reserved_4[88]; + u64 dr0; + u64 dr1; + u64 dr2; + u64 dr3; + u64 dr0_addr_mask; + u64 dr1_addr_mask; + u64 dr2_addr_mask; + u64 dr3_addr_mask; + u8 reserved_4[24]; u64 rsp; - u8 reserved_5[24]; + u64 s_cet; + u64 ssp; + u64 isst_addr; u64 rax; u64 star; u64 lstar; @@ -316,7 +332,7 @@ struct sev_es_save_area { u64 sysenter_esp; u64 sysenter_eip; u64 cr2; - u8 reserved_6[32]; + u8 reserved_5[32]; u64 g_pat; u64 dbgctl; u64 br_from; @@ -325,12 +341,12 @@ struct sev_es_save_area { u64 last_excp_to; u8 reserved_7[80]; u32 pkru; - u8 reserved_9[20]; - u64 reserved_10; /* rax already available at 0x01f8 */ + u8 reserved_8[20]; + u64 reserved_9; /* rax already available at 0x01f8 */ u64 rcx; u64 rdx; u64 rbx; - u64 reserved_11; /* rsp already available at 0x01d8 */ + u64 reserved_10; /* rsp already available at 0x01d8 */ u64 rbp; u64 rsi; u64 rdi; @@ -342,16 +358,34 @@ struct sev_es_save_area { u64 r13; u64 r14; u64 r15; - u8 reserved_12[16]; - u64 sw_exit_code; - u64 sw_exit_info_1; - u64 sw_exit_info_2; - u64 sw_scratch; + u8 reserved_11[16]; + u64 guest_exit_info_1; + u64 guest_exit_info_2; + u64 guest_exit_int_info; + u64 guest_nrip; u64 sev_features; - u8 reserved_13[48]; + u64 vintr_ctrl; + u64 guest_exit_code; + u64 virtual_tom; + u64 tlb_id; + u64 pcpu_id; + u64 event_inj; u64 xcr0; - u8 valid_bitmap[16]; - u64 x87_state_gpa; + u8 reserved_12[16]; + + /* Floating point area */ + u64 x87_dp; + u32 mxcsr; + u16 x87_ftw; + u16 x87_fsw; + u16 x87_fcw; + u16 x87_fop; + u16 x87_ds; + u16 x87_cs; + u64 x87_rip; + u8 fpreg_x87[80]; + u8 fpreg_xmm[256]; + u8 fpreg_ymm[256]; } __packed; struct ghcb_save_area { @@ -410,7 +444,7 @@ struct ghcb { #define EXPECTED_VMCB_SAVE_AREA_SIZE 740 #define EXPECTED_GHCB_SAVE_AREA_SIZE 1032 -#define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1032 +#define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1648 #define EXPECTED_VMCB_CONTROL_AREA_SIZE 1024 #define EXPECTED_GHCB_SIZE PAGE_SIZE -- 2.25.1