From: Gayatri Kammela <gayatri.kammela@intel.com> To: platform-driver-x86@vger.kernel.org Cc: mgross@linux.intel.com, hdegoede@redhat.com, irenic.rajneesh@gmail.com, andriy.shevchenko@linux.intel.com, vicamo.yang@canonical.com, srinivas.pandruvada@intel.com, david.e.box@intel.com, chao.qin@intel.com, linux-kernel@vger.kernel.org, tamar.mashiah@intel.com, gregkh@linuxfoundation.org, rajatja@google.com, Shyam-sundar.S-k@amd.com, Alexander.Deucher@amd.com, mlimonci@amd.com, Gayatri Kammela <gayatri.kammela@intel.com>, Andy Shevchenko <andy.shevchenko@gmail.com> Subject: [PATCH v7 1/5] platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc subfolder Date: Mon, 16 Aug 2021 09:58:30 -0700 [thread overview] Message-ID: <81b6292e50af54fb7eeabfefde6f4a3d283b0b96.1629091915.git.gayatri.kammela@intel.com> (raw) In-Reply-To: <cover.1629091915.git.gayatri.kammela@intel.com> As part of collecting Intel x86 specific drivers in their own folder, move intel_pmc_core* files to its own subfolder there. Cc: Chao Qin <chao.qin@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: David Box <david.e.box@intel.com> Cc: You-Sheng Yang <vicamo.yang@canonical.com> Cc: Hans de Goede <hdegoede@redhat.com> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> --- MAINTAINERS | 2 +- drivers/platform/x86/Kconfig | 21 ------------------ drivers/platform/x86/Makefile | 1 - drivers/platform/x86/intel/Kconfig | 1 + drivers/platform/x86/intel/Makefile | 1 + drivers/platform/x86/intel/pmc/Kconfig | 22 +++++++++++++++++++ drivers/platform/x86/intel/pmc/Makefile | 6 +++++ .../{intel_pmc_core.c => intel/pmc/core.c} | 2 +- .../{intel_pmc_core.h => intel/pmc/core.h} | 0 .../pmc/core_platform.c} | 0 10 files changed, 32 insertions(+), 24 deletions(-) create mode 100644 drivers/platform/x86/intel/pmc/Kconfig create mode 100644 drivers/platform/x86/intel/pmc/Makefile rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (99%) rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (100%) rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/core_platform.c} (100%) diff --git a/MAINTAINERS b/MAINTAINERS index fd25e4ecf0b9..5e118faf8018 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9477,7 +9477,7 @@ M: David E Box <david.e.box@intel.com> L: platform-driver-x86@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-platform-intel-pmc -F: drivers/platform/x86/intel_pmc_core* +F: drivers/platform/x86/intel/pmc/core* INTEL PMIC GPIO DRIVERS M: Andy Shevchenko <andy@kernel.org> diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index d12db6c316ea..c4ee38eba44b 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -1187,27 +1187,6 @@ config INTEL_MRFLD_PWRBTN To compile this driver as a module, choose M here: the module will be called intel_mrfld_pwrbtn. -config INTEL_PMC_CORE - tristate "Intel PMC Core driver" - depends on PCI - depends on ACPI - help - The Intel Platform Controller Hub for Intel Core SoCs provides access - to Power Management Controller registers via various interfaces. This - driver can utilize debugging capabilities and supported features as - exposed by the Power Management Controller. It also may perform some - tasks in the PMC in order to enable transition into the SLPS0 state. - It should be selected on all Intel platforms supported by the driver. - - Supported features: - - SLP_S0_RESIDENCY counter - - PCH IP Power Gating status - - LTR Ignore / LTR Show - - MPHY/PLL gating status (Sunrisepoint PCH only) - - SLPS0 Debug registers (Cannonlake/Icelake PCH) - - Low Power Mode registers (Tigerlake and beyond) - - PMC quirks as needed to enable SLPS0/S0ix - config INTEL_PMT_CLASS tristate help diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index 7ee369aab10d..43d36f8c36f1 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -128,7 +128,6 @@ obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency.o obj-$(CONFIG_INTEL_BXTWC_PMIC_TMU) += intel_bxtwc_tmu.o obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN) += intel_chtdc_ti_pwrbtn.o obj-$(CONFIG_INTEL_MRFLD_PWRBTN) += intel_mrfld_pwrbtn.o -obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o intel_pmc_core_pltdrv.o obj-$(CONFIG_INTEL_PMT_CLASS) += intel_pmt_class.o obj-$(CONFIG_INTEL_PMT_TELEMETRY) += intel_pmt_telemetry.o obj-$(CONFIG_INTEL_PMT_CRASHLOG) += intel_pmt_crashlog.o diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/intel/Kconfig index f2eef337eb98..8ca021785f67 100644 --- a/drivers/platform/x86/intel/Kconfig +++ b/drivers/platform/x86/intel/Kconfig @@ -18,5 +18,6 @@ if X86_PLATFORM_DRIVERS_INTEL source "drivers/platform/x86/intel/int33fe/Kconfig" source "drivers/platform/x86/intel/int3472/Kconfig" +source "drivers/platform/x86/intel/pmc/Kconfig" endif # X86_PLATFORM_DRIVERS_INTEL diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/intel/Makefile index 0653055942d5..49962f4dfdec 100644 --- a/drivers/platform/x86/intel/Makefile +++ b/drivers/platform/x86/intel/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_INTEL_CHT_INT33FE) += int33fe/ obj-$(CONFIG_INTEL_SKL_INT3472) += int3472/ +obj-$(CONFIG_INTEL_PMC_CORE) += pmc/ diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/intel/pmc/Kconfig new file mode 100644 index 000000000000..c16fc9b2611c --- /dev/null +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -0,0 +1,22 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config INTEL_PMC_CORE + tristate "Intel PMC Core driver" + depends on PCI + depends on ACPI + help + The Intel Platform Controller Hub for Intel Core SoCs provides access + to Power Management Controller registers via various interfaces. This + driver can utilize debugging capabilities and supported features as + exposed by the Power Management Controller. It also may perform some + tasks in the PMC in order to enable transition into the SLPS0 state. + It should be selected on all Intel platforms supported by the driver. + + Supported features: + - SLP_S0_RESIDENCY counter + - PCH IP Power Gating status + - LTR Ignore / LTR Show + - MPHY/PLL gating status (Sunrise Point PCH only) + - SLPS0 Debug registers (Cannon Lake/Ice Lake PCH) + - Low Power Mode registers (Tiger Lake and beyond) + - PMC quirks as needed to enable SLPS0/S0ix diff --git a/drivers/platform/x86/intel/pmc/Makefile b/drivers/platform/x86/intel/pmc/Makefile new file mode 100644 index 000000000000..c92e66846a4a --- /dev/null +++ b/drivers/platform/x86/intel/pmc/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# + +obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o +intel_pmc_core-objs := core.o \ + core_platform.o diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel/pmc/core.c similarity index 99% rename from drivers/platform/x86/intel_pmc_core.c rename to drivers/platform/x86/intel/pmc/core.c index b0e486a6bdfb..f9de78b08e5d 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -31,7 +31,7 @@ #include <asm/msr.h> #include <asm/tsc.h> -#include "intel_pmc_core.h" +#include "core.h" #define ACPI_S0IX_DSM_UUID "57a6512e-3979-4e9d-9708-ff13b2508972" #define ACPI_GET_LOW_MODE_REGISTERS 1 diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel/pmc/core.h similarity index 100% rename from drivers/platform/x86/intel_pmc_core.h rename to drivers/platform/x86/intel/pmc/core.h diff --git a/drivers/platform/x86/intel_pmc_core_pltdrv.c b/drivers/platform/x86/intel/pmc/core_platform.c similarity index 100% rename from drivers/platform/x86/intel_pmc_core_pltdrv.c rename to drivers/platform/x86/intel/pmc/core_platform.c -- 2.25.1
next prev parent reply other threads:[~2021-08-16 17:02 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-16 16:58 [PATCH v7 0/5] Add Alder Lake PCH-S support to PMC core driver Gayatri Kammela 2021-08-16 16:58 ` Gayatri Kammela [this message] 2021-08-16 19:31 ` [PATCH v7 1/5] platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc subfolder Andy Shevchenko 2021-08-16 20:51 ` Kammela, Gayatri 2021-08-17 18:47 ` Hans de Goede 2021-08-19 10:52 ` Hans de Goede 2021-08-16 16:58 ` [PATCH v7 2/5] platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver Gayatri Kammela 2021-08-16 16:58 ` [PATCH v7 3/5] platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) support to Alder Lake Gayatri Kammela 2021-08-16 16:58 ` [PATCH v7 4/5] platform/x86/intel: pmc/core: Add Alder Lake low power mode support for pmc core Gayatri Kammela 2021-08-16 16:58 ` [PATCH v7 5/5] platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake PCH Gayatri Kammela
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