From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B280C433F5 for ; Wed, 8 Dec 2021 17:41:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232434AbhLHRpZ (ORCPT ); Wed, 8 Dec 2021 12:45:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231695AbhLHRpW (ORCPT ); Wed, 8 Dec 2021 12:45:22 -0500 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B53A4C061746; Wed, 8 Dec 2021 09:41:50 -0800 (PST) Received: from zn.tnic (dslb-088-067-202-008.088.067.pools.vodafone-ip.de [88.67.202.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 85D481EC04D3; Wed, 8 Dec 2021 18:41:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1638985303; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=BVB1m3MrNRyz7QEt2fceR49E0yXRKK99UJ6lToflU+M=; b=plYDMSSdy0AlmPWLQfXS/7oOeIwQCRt1HOSpB0McPkEavfxw4f8gLgIuMdXHY83gDJ/xJX 0RCjuXJK2+CkfQfDA6ItGYTPBrLza2XhPdTQUw/RYpNqE9/f6br44Xd7qmGMcAVyb8g9yN XehNfufGbEq41gGE3w/dhMtObAW6vXE= Date: Wed, 8 Dec 2021 18:41:46 +0100 From: Borislav Petkov To: Brijesh Singh Cc: x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Jim Mattson , Andy Lutomirski , Dave Hansen , Sergio Lopez , Peter Gonda , Peter Zijlstra , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , "Dr . David Alan Gilbert" , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v7 16/45] x86/sev: Register GHCB memory when SEV-SNP is active Message-ID: References: <20211110220731.2396491-1-brijesh.singh@amd.com> <20211110220731.2396491-17-brijesh.singh@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20211110220731.2396491-17-brijesh.singh@amd.com> Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org On Wed, Nov 10, 2021 at 04:07:02PM -0600, Brijesh Singh wrote: > The SEV-SNP guest is required to perform GHCB GPA registration. This is > because the hypervisor may prefer that a guest use a consistent and/or > specific GPA for the GHCB associated with a vCPU. For more information, > see the GHCB specification section GHCB GPA Registration. > > During the boot, init_ghcb() allocates a per-cpu GHCB page. On very first > VC exception, That is not true anymore - you're doing proper init at init time - no more #VC hackery. > @@ -1977,6 +1978,10 @@ void cpu_init_exception_handling(void) > > load_TR_desc(); > > + /* Register the GHCB before taking any VC exception */ > + if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) No need for that if branch - sev_snp_register_ghcb() already has an empty stub for the !CONFIG_AMD_MEM_ENCRYPT case so you can simply call it unconditionally. > + sev_snp_register_ghcb(); > + > /* Finally load the IDT */ > load_current_idt(); > } > diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c > index 54bf0603002f..968105cec364 100644 > --- a/arch/x86/kernel/head64.c > +++ b/arch/x86/kernel/head64.c > @@ -588,6 +588,9 @@ void early_setup_idt(void) > > bringup_idt_descr.address = (unsigned long)bringup_idt_table; > native_load_idt(&bringup_idt_descr); > + > + if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) > + sev_snp_register_ghcb(); Ditto. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette