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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id r6-20020a05600c35c600b003ede03e4369sm2582875wmq.33.2023.04.05.08.37.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 08:37:02 -0700 (PDT) Date: Wed, 5 Apr 2023 17:37:01 +0200 From: Andrew Jones To: Conor Dooley Cc: Sunil V L , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-crypto@vger.kernel.org, platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev, "Rafael J . Wysocki" , "Rafael J . Wysocki" , Tom Rix , Weili Qian , Herbert Xu , Jonathan Corbet , Marc Zyngier , Daniel Lezcano , Albert Ou , Mark Gross , Hans de Goede , Paul Walmsley , Thomas Gleixner , Nathan Chancellor , Nick Desaulniers , Zhou Wang , Palmer Dabbelt , Len Brown , Maximilian Luz , "David S . Miller" Subject: Re: [PATCH V4 13/23] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() Message-ID: References: <20230404182037.863533-1-sunilvl@ventanamicro.com> <20230404182037.863533-14-sunilvl@ventanamicro.com> <20230404-promotion-scarce-7c69ff7e5f99@spud> <20230405-compel-slinky-2fe11b4bf0b3@spud> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230405-compel-slinky-2fe11b4bf0b3@spud> Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org On Wed, Apr 05, 2023 at 03:31:24PM +0100, Conor Dooley wrote: > On Wed, Apr 05, 2023 at 07:05:42PM +0530, Sunil V L wrote: > > On Tue, Apr 04, 2023 at 09:57:19PM +0100, Conor Dooley wrote: > > > On Tue, Apr 04, 2023 at 11:50:27PM +0530, Sunil V L wrote: ... > > > > - if (of_property_read_string(node, "riscv,isa", &isa)) { > > > > - pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); > > > > - continue; > > > > + if (acpi_disabled) { > > > > + node = of_cpu_device_node_get(cpu); > > > > + if (node) { > > > > + rc = of_property_read_string(node, "riscv,isa", &isa); > > > > > > Hmm, after digging in the previous patch, I think this is actually not > > > possible to fail? We already validated it when setting up the mask of > > > possible cpus, but I think leaving the error handling here makes things > > > a lot more obvious. > > > > > Yeah, do you prefer to merge these patches again since only in this > > patch, we change the loop to for_each_possible_cpu() from > > for_each_of_cpu_node() which actually makes riscv_of_processor_hartid() > > not useful? > > Yah, all 3 of us mistakenly thought that that was an unrelated cleanup > on the last revision, but clearly it is not. > Squash it back IMO, sorry for my part in the extra work generated. Yup, please squash back in. Sorry about that, Sunil! drew