From: Richard Henderson <richard.henderson@linaro.org>
To: Marc Zyngier <maz@kernel.org>, qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
Peter Maydell <peter.maydell@linaro.org>,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions
Date: Mon, 2 Dec 2019 07:35:25 -0800 [thread overview]
Message-ID: <0bc7c461-6b92-2782-4aec-2f649f5bc8cf@linaro.org> (raw)
In-Reply-To: <20191201122018.25808-4-maz@kernel.org>
On 12/1/19 12:20 PM, Marc Zyngier wrote:
> HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to
> EL2, and HCR_EL2.TID0 does the same for reads of FPSID.
> In order to handle this, introduce a new TCG helper function that
> checks for these control bits before executing the VMRC instruction.
>
> Tested with a hacked-up version of KVM/arm64 that sets the control
> bits for 32bit guests.
>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> target/arm/helper-a64.h | 2 ++
> target/arm/translate-vfp.inc.c | 18 +++++++++++++++---
> target/arm/vfp_helper.c | 29 +++++++++++++++++++++++++++++
> 3 files changed, 46 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Annoying that there's a bug in the manual -- FPSID is listed as group 0 in
plenty of places, except in the pseudo-code for Accessing the FPSID which uses
TID3.
r~
next prev parent reply other threads:[~2019-12-02 15:37 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-01 12:20 [PATCH v2 0/5] target/arm: More EL2 trapping fixes Marc Zyngier
2019-12-01 12:20 ` [PATCH v2 1/5] target/arm: Honor HCR_EL2.TID2 trapping requirements Marc Zyngier
2019-12-02 13:52 ` Edgar E. Iglesias
2019-12-02 15:10 ` Richard Henderson
2019-12-01 12:20 ` [PATCH v2 2/5] target/arm: Honor HCR_EL2.TID1 " Marc Zyngier
2019-12-02 15:22 ` Richard Henderson
2019-12-01 12:20 ` [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions Marc Zyngier
2019-12-02 15:35 ` Richard Henderson [this message]
2019-12-02 16:45 ` Marc Zyngier
2019-12-02 16:56 ` Richard Henderson
2019-12-02 17:15 ` Marc Zyngier
2019-12-06 14:08 ` Peter Maydell
2019-12-06 14:14 ` Marc Zyngier
2019-12-06 17:45 ` Richard Henderson
2019-12-01 12:20 ` [PATCH v2 4/5] target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 Marc Zyngier
2019-12-02 15:52 ` Richard Henderson
2019-12-01 12:20 ` [PATCH v2 5/5] target/arm: Add support for missing Jazelle system registers Marc Zyngier
2019-12-02 14:07 ` Edgar E. Iglesias
2019-12-02 15:57 ` Richard Henderson
2019-12-06 13:56 ` Peter Maydell
2019-12-06 14:13 ` [PATCH v2 0/5] target/arm: More EL2 trapping fixes Peter Maydell
2019-12-06 14:19 ` Marc Zyngier
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