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From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Andrew Jeffery" <andrew@aj.id.au>,
	"Helge Deller" <deller@gmx.de>, "Paul Durrant" <paul@xen.org>,
	qemu-trivial@nongnu.org, "Cédric Le Goater" <clg@kaod.org>,
	qemu-arm@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
	"Joel Stanley" <joel@jms.id.au>,
	xen-devel@lists.xenproject.org,
	"Anthony Perard" <anthony.perard@citrix.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-ppc@nongnu.org, "Richard Henderson" <rth@twiddle.net>
Subject: Re: [PATCH v2 1/8] hw/arm/aspeed: Correct DRAM container region size
Date: Mon, 1 Jun 2020 16:34:52 -0700	[thread overview]
Message-ID: <0c840231-813a-20a4-62c0-a3d42c33914f@linaro.org> (raw)
In-Reply-To: <20200601142930.29408-2-f4bug@amsat.org>

On 6/1/20 7:29 AM, Philippe Mathieu-Daudé wrote:
> memory_region_set_size() handle the 16 Exabytes limit by
> special-casing the UINT64_MAX value. This is not a problem
> for the 32-bit maximum, 4 GiB.
> By using the UINT32_MAX value, the aspeed-ram-container
> MemoryRegion ends up missing 1 byte:
> 
>  $ qemu-system-arm -M ast2600-evb -S -monitor stdio
>  (qemu) info mtree
> 
>   address-space: aspeed.fmc-ast2600-dma-dram
>     0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container
>       0000000080000000-00000000bfffffff (prio 0, ram): ram
>       00000000c0000000-ffffffffffffffff (prio 0, i/o): max_ram
> 
> Fix by using the correct value. We now have:
> 
>   address-space: aspeed.fmc-ast2600-dma-dram
>     0000000080000000-000000017fffffff (prio 0, i/o): aspeed-ram-container
>       0000000080000000-00000000bfffffff (prio 0, ram): ram
>       00000000c0000000-ffffffffffffffff (prio 0, i/o): max_ram
> 
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  hw/arm/aspeed.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~



  parent reply	other threads:[~2020-06-01 23:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-01 14:29 [PATCH v2 0/8] hw: Fix some incomplete memory region size Philippe Mathieu-Daudé
2020-06-01 14:29 ` [PATCH v2 1/8] hw/arm/aspeed: Correct DRAM container " Philippe Mathieu-Daudé
2020-06-01 16:06   ` Cédric Le Goater
2020-06-01 23:34   ` Richard Henderson [this message]
2020-06-09 17:29   ` Laurent Vivier
2020-06-01 14:29 ` [PATCH v2 2/8] hw/pci-host/prep: Correct RAVEN bus bridge memory " Philippe Mathieu-Daudé
2020-06-01 23:35   ` Richard Henderson
2020-06-01 14:29 ` [PATCH v2 3/8] hw/pci/pci_bridge: Correct pci_bridge_io " Philippe Mathieu-Daudé
2020-06-01 23:35   ` Richard Henderson
2020-06-01 14:29 ` [PATCH v2 4/8] hw/pci/pci_bridge: Use the IEC binary prefix definitions Philippe Mathieu-Daudé
2020-06-01 23:36   ` Richard Henderson
2020-06-01 14:29 ` [PATCH v2 5/8] hw/pci-host: " Philippe Mathieu-Daudé
2020-06-01 23:36   ` Richard Henderson
2020-06-01 14:29 ` [PATCH v2 6/8] hw/hppa/dino: " Philippe Mathieu-Daudé
2020-06-01 23:37   ` Richard Henderson
2020-06-09 17:30   ` Laurent Vivier
2020-06-01 14:29 ` [PATCH v2 7/8] hw/i386/xen/xen-hvm: " Philippe Mathieu-Daudé
2020-06-01 15:24   ` Paul Durrant
2020-06-01 23:37   ` Richard Henderson
2020-06-09 17:31   ` Laurent Vivier
2020-06-01 14:29 ` [PATCH v2 8/8] target/i386/cpu: " Philippe Mathieu-Daudé
2020-06-01 23:37   ` Richard Henderson
2020-06-09 17:33   ` Laurent Vivier
2020-06-02  3:49 ` [PATCH v2 0/8] hw: Fix some incomplete memory region size Michael S. Tsirkin

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