From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Huacai Chen <chenhuacai@kernel.org>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 14/26] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder
Date: Sun, 18 Apr 2021 12:35:23 -0700 [thread overview]
Message-ID: <122fac14-a7cd-87c1-5217-d86d8af49cb2@linaro.org> (raw)
In-Reply-To: <20210418163134.1133100-15-f4bug@amsat.org>
On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote:
> Declare cpu_mips_get_random() and update_pagemask() on local scope,
What is "local scope"? Anyway, I don't see what this has to do with the rest
of the code movement.
r~
> and move cp0_helper.c and mips-semi.c to the new tcg/sysemu/ folder,
> adapting the Meson machinery.
>
> Move the opcode definitions to tcg/sysemu_helper.h.inc.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> target/mips/helper.h | 166 +--------------------
> target/mips/internal.h | 4 -
> target/mips/tcg/tcg-internal.h | 9 ++
> target/mips/tcg/sysemu_helper.h.inc | 168 ++++++++++++++++++++++
> target/mips/{ => tcg/sysemu}/cp0_helper.c | 0
> target/mips/{ => tcg/sysemu}/mips-semi.c | 0
> target/mips/meson.build | 5 -
> target/mips/tcg/meson.build | 3 +
> target/mips/tcg/sysemu/meson.build | 4 +
> 9 files changed, 188 insertions(+), 171 deletions(-)
> create mode 100644 target/mips/tcg/sysemu_helper.h.inc
> rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%)
> rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%)
> create mode 100644 target/mips/tcg/sysemu/meson.build
>
> diff --git a/target/mips/helper.h b/target/mips/helper.h
> index 709494445dd..bc308e5db13 100644
> --- a/target/mips/helper.h
> +++ b/target/mips/helper.h
> @@ -2,10 +2,6 @@ DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int)
> DEF_HELPER_2(raise_exception, noreturn, env, i32)
> DEF_HELPER_1(raise_exception_debug, noreturn, env)
>
> -#ifndef CONFIG_USER_ONLY
> -DEF_HELPER_1(do_semihosting, void, env)
> -#endif
> -
> #ifdef TARGET_MIPS64
> DEF_HELPER_4(sdl, void, env, tl, tl, int)
> DEF_HELPER_4(sdr, void, env, tl, tl, int)
> @@ -42,164 +38,6 @@ DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl)
>
> DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32, i32, i32)
>
> -#ifndef CONFIG_USER_ONLY
> -/* CP0 helpers */
> -DEF_HELPER_1(mfc0_mvpcontrol, tl, env)
> -DEF_HELPER_1(mfc0_mvpconf0, tl, env)
> -DEF_HELPER_1(mfc0_mvpconf1, tl, env)
> -DEF_HELPER_1(mftc0_vpecontrol, tl, env)
> -DEF_HELPER_1(mftc0_vpeconf0, tl, env)
> -DEF_HELPER_1(mfc0_random, tl, env)
> -DEF_HELPER_1(mfc0_tcstatus, tl, env)
> -DEF_HELPER_1(mftc0_tcstatus, tl, env)
> -DEF_HELPER_1(mfc0_tcbind, tl, env)
> -DEF_HELPER_1(mftc0_tcbind, tl, env)
> -DEF_HELPER_1(mfc0_tcrestart, tl, env)
> -DEF_HELPER_1(mftc0_tcrestart, tl, env)
> -DEF_HELPER_1(mfc0_tchalt, tl, env)
> -DEF_HELPER_1(mftc0_tchalt, tl, env)
> -DEF_HELPER_1(mfc0_tccontext, tl, env)
> -DEF_HELPER_1(mftc0_tccontext, tl, env)
> -DEF_HELPER_1(mfc0_tcschedule, tl, env)
> -DEF_HELPER_1(mftc0_tcschedule, tl, env)
> -DEF_HELPER_1(mfc0_tcschefback, tl, env)
> -DEF_HELPER_1(mftc0_tcschefback, tl, env)
> -DEF_HELPER_1(mfc0_count, tl, env)
> -DEF_HELPER_1(mfc0_saar, tl, env)
> -DEF_HELPER_1(mfhc0_saar, tl, env)
> -DEF_HELPER_1(mftc0_entryhi, tl, env)
> -DEF_HELPER_1(mftc0_status, tl, env)
> -DEF_HELPER_1(mftc0_cause, tl, env)
> -DEF_HELPER_1(mftc0_epc, tl, env)
> -DEF_HELPER_1(mftc0_ebase, tl, env)
> -DEF_HELPER_2(mftc0_configx, tl, env, tl)
> -DEF_HELPER_1(mfc0_lladdr, tl, env)
> -DEF_HELPER_1(mfc0_maar, tl, env)
> -DEF_HELPER_1(mfhc0_maar, tl, env)
> -DEF_HELPER_2(mfc0_watchlo, tl, env, i32)
> -DEF_HELPER_2(mfc0_watchhi, tl, env, i32)
> -DEF_HELPER_2(mfhc0_watchhi, tl, env, i32)
> -DEF_HELPER_1(mfc0_debug, tl, env)
> -DEF_HELPER_1(mftc0_debug, tl, env)
> -#ifdef TARGET_MIPS64
> -DEF_HELPER_1(dmfc0_tcrestart, tl, env)
> -DEF_HELPER_1(dmfc0_tchalt, tl, env)
> -DEF_HELPER_1(dmfc0_tccontext, tl, env)
> -DEF_HELPER_1(dmfc0_tcschedule, tl, env)
> -DEF_HELPER_1(dmfc0_tcschefback, tl, env)
> -DEF_HELPER_1(dmfc0_lladdr, tl, env)
> -DEF_HELPER_1(dmfc0_maar, tl, env)
> -DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
> -DEF_HELPER_2(dmfc0_watchhi, tl, env, i32)
> -DEF_HELPER_1(dmfc0_saar, tl, env)
> -#endif /* TARGET_MIPS64 */
> -
> -DEF_HELPER_2(mtc0_index, void, env, tl)
> -DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl)
> -DEF_HELPER_2(mtc0_vpecontrol, void, env, tl)
> -DEF_HELPER_2(mttc0_vpecontrol, void, env, tl)
> -DEF_HELPER_2(mtc0_vpeconf0, void, env, tl)
> -DEF_HELPER_2(mttc0_vpeconf0, void, env, tl)
> -DEF_HELPER_2(mtc0_vpeconf1, void, env, tl)
> -DEF_HELPER_2(mtc0_yqmask, void, env, tl)
> -DEF_HELPER_2(mtc0_vpeopt, void, env, tl)
> -DEF_HELPER_2(mtc0_entrylo0, void, env, tl)
> -DEF_HELPER_2(mtc0_tcstatus, void, env, tl)
> -DEF_HELPER_2(mttc0_tcstatus, void, env, tl)
> -DEF_HELPER_2(mtc0_tcbind, void, env, tl)
> -DEF_HELPER_2(mttc0_tcbind, void, env, tl)
> -DEF_HELPER_2(mtc0_tcrestart, void, env, tl)
> -DEF_HELPER_2(mttc0_tcrestart, void, env, tl)
> -DEF_HELPER_2(mtc0_tchalt, void, env, tl)
> -DEF_HELPER_2(mttc0_tchalt, void, env, tl)
> -DEF_HELPER_2(mtc0_tccontext, void, env, tl)
> -DEF_HELPER_2(mttc0_tccontext, void, env, tl)
> -DEF_HELPER_2(mtc0_tcschedule, void, env, tl)
> -DEF_HELPER_2(mttc0_tcschedule, void, env, tl)
> -DEF_HELPER_2(mtc0_tcschefback, void, env, tl)
> -DEF_HELPER_2(mttc0_tcschefback, void, env, tl)
> -DEF_HELPER_2(mtc0_entrylo1, void, env, tl)
> -DEF_HELPER_2(mtc0_context, void, env, tl)
> -DEF_HELPER_2(mtc0_memorymapid, void, env, tl)
> -DEF_HELPER_2(mtc0_pagemask, void, env, tl)
> -DEF_HELPER_2(mtc0_pagegrain, void, env, tl)
> -DEF_HELPER_2(mtc0_segctl0, void, env, tl)
> -DEF_HELPER_2(mtc0_segctl1, void, env, tl)
> -DEF_HELPER_2(mtc0_segctl2, void, env, tl)
> -DEF_HELPER_2(mtc0_pwfield, void, env, tl)
> -DEF_HELPER_2(mtc0_pwsize, void, env, tl)
> -DEF_HELPER_2(mtc0_wired, void, env, tl)
> -DEF_HELPER_2(mtc0_srsconf0, void, env, tl)
> -DEF_HELPER_2(mtc0_srsconf1, void, env, tl)
> -DEF_HELPER_2(mtc0_srsconf2, void, env, tl)
> -DEF_HELPER_2(mtc0_srsconf3, void, env, tl)
> -DEF_HELPER_2(mtc0_srsconf4, void, env, tl)
> -DEF_HELPER_2(mtc0_hwrena, void, env, tl)
> -DEF_HELPER_2(mtc0_pwctl, void, env, tl)
> -DEF_HELPER_2(mtc0_count, void, env, tl)
> -DEF_HELPER_2(mtc0_saari, void, env, tl)
> -DEF_HELPER_2(mtc0_saar, void, env, tl)
> -DEF_HELPER_2(mthc0_saar, void, env, tl)
> -DEF_HELPER_2(mtc0_entryhi, void, env, tl)
> -DEF_HELPER_2(mttc0_entryhi, void, env, tl)
> -DEF_HELPER_2(mtc0_compare, void, env, tl)
> -DEF_HELPER_2(mtc0_status, void, env, tl)
> -DEF_HELPER_2(mttc0_status, void, env, tl)
> -DEF_HELPER_2(mtc0_intctl, void, env, tl)
> -DEF_HELPER_2(mtc0_srsctl, void, env, tl)
> -DEF_HELPER_2(mtc0_cause, void, env, tl)
> -DEF_HELPER_2(mttc0_cause, void, env, tl)
> -DEF_HELPER_2(mtc0_ebase, void, env, tl)
> -DEF_HELPER_2(mttc0_ebase, void, env, tl)
> -DEF_HELPER_2(mtc0_config0, void, env, tl)
> -DEF_HELPER_2(mtc0_config2, void, env, tl)
> -DEF_HELPER_2(mtc0_config3, void, env, tl)
> -DEF_HELPER_2(mtc0_config4, void, env, tl)
> -DEF_HELPER_2(mtc0_config5, void, env, tl)
> -DEF_HELPER_2(mtc0_lladdr, void, env, tl)
> -DEF_HELPER_2(mtc0_maar, void, env, tl)
> -DEF_HELPER_2(mthc0_maar, void, env, tl)
> -DEF_HELPER_2(mtc0_maari, void, env, tl)
> -DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
> -DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
> -DEF_HELPER_3(mthc0_watchhi, void, env, tl, i32)
> -DEF_HELPER_2(mtc0_xcontext, void, env, tl)
> -DEF_HELPER_2(mtc0_framemask, void, env, tl)
> -DEF_HELPER_2(mtc0_debug, void, env, tl)
> -DEF_HELPER_2(mttc0_debug, void, env, tl)
> -DEF_HELPER_2(mtc0_performance0, void, env, tl)
> -DEF_HELPER_2(mtc0_errctl, void, env, tl)
> -DEF_HELPER_2(mtc0_taglo, void, env, tl)
> -DEF_HELPER_2(mtc0_datalo, void, env, tl)
> -DEF_HELPER_2(mtc0_taghi, void, env, tl)
> -DEF_HELPER_2(mtc0_datahi, void, env, tl)
> -
> -#if defined(TARGET_MIPS64)
> -DEF_HELPER_2(dmtc0_entrylo0, void, env, i64)
> -DEF_HELPER_2(dmtc0_entrylo1, void, env, i64)
> -#endif
> -
> -/* MIPS MT functions */
> -DEF_HELPER_2(mftgpr, tl, env, i32)
> -DEF_HELPER_2(mftlo, tl, env, i32)
> -DEF_HELPER_2(mfthi, tl, env, i32)
> -DEF_HELPER_2(mftacx, tl, env, i32)
> -DEF_HELPER_1(mftdsp, tl, env)
> -DEF_HELPER_3(mttgpr, void, env, tl, i32)
> -DEF_HELPER_3(mttlo, void, env, tl, i32)
> -DEF_HELPER_3(mtthi, void, env, tl, i32)
> -DEF_HELPER_3(mttacx, void, env, tl, i32)
> -DEF_HELPER_2(mttdsp, void, env, tl)
> -DEF_HELPER_0(dmt, tl)
> -DEF_HELPER_0(emt, tl)
> -DEF_HELPER_1(dvpe, tl, env)
> -DEF_HELPER_1(evpe, tl, env)
> -
> -/* R6 Multi-threading */
> -DEF_HELPER_1(dvp, tl, env)
> -DEF_HELPER_1(evp, tl, env)
> -#endif /* !CONFIG_USER_ONLY */
> -
> /* microMIPS functions */
> DEF_HELPER_4(lwm, void, env, tl, tl, i32)
> DEF_HELPER_4(swm, void, env, tl, tl, i32)
> @@ -783,4 +621,8 @@ DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
>
> DEF_HELPER_3(cache, void, env, tl, i32)
>
> +#ifndef CONFIG_USER_ONLY
> +#include "tcg/sysemu_helper.h.inc"
> +#endif /* !CONFIG_USER_ONLY */
> +
> #include "msa_helper.h.inc"
> diff --git a/target/mips/internal.h b/target/mips/internal.h
> index 51a45bd397a..59c2c22cd0a 100644
> --- a/target/mips/internal.h
> +++ b/target/mips/internal.h
> @@ -165,7 +165,6 @@ void r4k_helper_tlbr(CPUMIPSState *env);
> void r4k_helper_tlbinv(CPUMIPSState *env);
> void r4k_helper_tlbinvf(CPUMIPSState *env);
> void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
> -uint32_t cpu_mips_get_random(CPUMIPSState *env);
>
> void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
> vaddr addr, unsigned size,
> @@ -237,9 +236,6 @@ void cpu_mips_stop_count(CPUMIPSState *env);
> /* helper.c */
> void mmu_init(CPUMIPSState *env, const mips_def_t *def);
>
> -/* op_helper.c */
> -void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
> -
> static inline void restore_pamask(CPUMIPSState *env)
> {
> if (env->hflags & MIPS_HFLAG_ELPA) {
> diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
> index 24438667f47..b65580af211 100644
> --- a/target/mips/tcg/tcg-internal.h
> +++ b/target/mips/tcg/tcg-internal.h
> @@ -11,10 +11,19 @@
> #define MIPS_TCG_INTERNAL_H
>
> #include "hw/core/cpu.h"
> +#include "cpu.h"
>
> void mips_cpu_do_interrupt(CPUState *cpu);
> bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> MMUAccessType access_type, int mmu_idx,
> bool probe, uintptr_t retaddr);
>
> +#if !defined(CONFIG_USER_ONLY)
> +
> +void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
> +
> +uint32_t cpu_mips_get_random(CPUMIPSState *env);
> +
> +#endif /* !CONFIG_USER_ONLY */
> +
> #endif
> diff --git a/target/mips/tcg/sysemu_helper.h.inc b/target/mips/tcg/sysemu_helper.h.inc
> new file mode 100644
> index 00000000000..d136c4160a7
> --- /dev/null
> +++ b/target/mips/tcg/sysemu_helper.h.inc
> @@ -0,0 +1,168 @@
> +/*
> + * QEMU MIPS sysemu helpers
> + *
> + * Copyright (c) 2004-2005 Jocelyn Mayer
> + * Copyright (c) 2006 Marius Groeger (FPU operations)
> + * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support)
> + * Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support)
> + *
> + * SPDX-License-Identifier: LGPL-2.1-or-later
> + */
> +
> +DEF_HELPER_1(do_semihosting, void, env)
> +
> +/* CP0 helpers */
> +DEF_HELPER_1(mfc0_mvpcontrol, tl, env)
> +DEF_HELPER_1(mfc0_mvpconf0, tl, env)
> +DEF_HELPER_1(mfc0_mvpconf1, tl, env)
> +DEF_HELPER_1(mftc0_vpecontrol, tl, env)
> +DEF_HELPER_1(mftc0_vpeconf0, tl, env)
> +DEF_HELPER_1(mfc0_random, tl, env)
> +DEF_HELPER_1(mfc0_tcstatus, tl, env)
> +DEF_HELPER_1(mftc0_tcstatus, tl, env)
> +DEF_HELPER_1(mfc0_tcbind, tl, env)
> +DEF_HELPER_1(mftc0_tcbind, tl, env)
> +DEF_HELPER_1(mfc0_tcrestart, tl, env)
> +DEF_HELPER_1(mftc0_tcrestart, tl, env)
> +DEF_HELPER_1(mfc0_tchalt, tl, env)
> +DEF_HELPER_1(mftc0_tchalt, tl, env)
> +DEF_HELPER_1(mfc0_tccontext, tl, env)
> +DEF_HELPER_1(mftc0_tccontext, tl, env)
> +DEF_HELPER_1(mfc0_tcschedule, tl, env)
> +DEF_HELPER_1(mftc0_tcschedule, tl, env)
> +DEF_HELPER_1(mfc0_tcschefback, tl, env)
> +DEF_HELPER_1(mftc0_tcschefback, tl, env)
> +DEF_HELPER_1(mfc0_count, tl, env)
> +DEF_HELPER_1(mfc0_saar, tl, env)
> +DEF_HELPER_1(mfhc0_saar, tl, env)
> +DEF_HELPER_1(mftc0_entryhi, tl, env)
> +DEF_HELPER_1(mftc0_status, tl, env)
> +DEF_HELPER_1(mftc0_cause, tl, env)
> +DEF_HELPER_1(mftc0_epc, tl, env)
> +DEF_HELPER_1(mftc0_ebase, tl, env)
> +DEF_HELPER_2(mftc0_configx, tl, env, tl)
> +DEF_HELPER_1(mfc0_lladdr, tl, env)
> +DEF_HELPER_1(mfc0_maar, tl, env)
> +DEF_HELPER_1(mfhc0_maar, tl, env)
> +DEF_HELPER_2(mfc0_watchlo, tl, env, i32)
> +DEF_HELPER_2(mfc0_watchhi, tl, env, i32)
> +DEF_HELPER_2(mfhc0_watchhi, tl, env, i32)
> +DEF_HELPER_1(mfc0_debug, tl, env)
> +DEF_HELPER_1(mftc0_debug, tl, env)
> +#ifdef TARGET_MIPS64
> +DEF_HELPER_1(dmfc0_tcrestart, tl, env)
> +DEF_HELPER_1(dmfc0_tchalt, tl, env)
> +DEF_HELPER_1(dmfc0_tccontext, tl, env)
> +DEF_HELPER_1(dmfc0_tcschedule, tl, env)
> +DEF_HELPER_1(dmfc0_tcschefback, tl, env)
> +DEF_HELPER_1(dmfc0_lladdr, tl, env)
> +DEF_HELPER_1(dmfc0_maar, tl, env)
> +DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
> +DEF_HELPER_2(dmfc0_watchhi, tl, env, i32)
> +DEF_HELPER_1(dmfc0_saar, tl, env)
> +#endif /* TARGET_MIPS64 */
> +
> +DEF_HELPER_2(mtc0_index, void, env, tl)
> +DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl)
> +DEF_HELPER_2(mtc0_vpecontrol, void, env, tl)
> +DEF_HELPER_2(mttc0_vpecontrol, void, env, tl)
> +DEF_HELPER_2(mtc0_vpeconf0, void, env, tl)
> +DEF_HELPER_2(mttc0_vpeconf0, void, env, tl)
> +DEF_HELPER_2(mtc0_vpeconf1, void, env, tl)
> +DEF_HELPER_2(mtc0_yqmask, void, env, tl)
> +DEF_HELPER_2(mtc0_vpeopt, void, env, tl)
> +DEF_HELPER_2(mtc0_entrylo0, void, env, tl)
> +DEF_HELPER_2(mtc0_tcstatus, void, env, tl)
> +DEF_HELPER_2(mttc0_tcstatus, void, env, tl)
> +DEF_HELPER_2(mtc0_tcbind, void, env, tl)
> +DEF_HELPER_2(mttc0_tcbind, void, env, tl)
> +DEF_HELPER_2(mtc0_tcrestart, void, env, tl)
> +DEF_HELPER_2(mttc0_tcrestart, void, env, tl)
> +DEF_HELPER_2(mtc0_tchalt, void, env, tl)
> +DEF_HELPER_2(mttc0_tchalt, void, env, tl)
> +DEF_HELPER_2(mtc0_tccontext, void, env, tl)
> +DEF_HELPER_2(mttc0_tccontext, void, env, tl)
> +DEF_HELPER_2(mtc0_tcschedule, void, env, tl)
> +DEF_HELPER_2(mttc0_tcschedule, void, env, tl)
> +DEF_HELPER_2(mtc0_tcschefback, void, env, tl)
> +DEF_HELPER_2(mttc0_tcschefback, void, env, tl)
> +DEF_HELPER_2(mtc0_entrylo1, void, env, tl)
> +DEF_HELPER_2(mtc0_context, void, env, tl)
> +DEF_HELPER_2(mtc0_memorymapid, void, env, tl)
> +DEF_HELPER_2(mtc0_pagemask, void, env, tl)
> +DEF_HELPER_2(mtc0_pagegrain, void, env, tl)
> +DEF_HELPER_2(mtc0_segctl0, void, env, tl)
> +DEF_HELPER_2(mtc0_segctl1, void, env, tl)
> +DEF_HELPER_2(mtc0_segctl2, void, env, tl)
> +DEF_HELPER_2(mtc0_pwfield, void, env, tl)
> +DEF_HELPER_2(mtc0_pwsize, void, env, tl)
> +DEF_HELPER_2(mtc0_wired, void, env, tl)
> +DEF_HELPER_2(mtc0_srsconf0, void, env, tl)
> +DEF_HELPER_2(mtc0_srsconf1, void, env, tl)
> +DEF_HELPER_2(mtc0_srsconf2, void, env, tl)
> +DEF_HELPER_2(mtc0_srsconf3, void, env, tl)
> +DEF_HELPER_2(mtc0_srsconf4, void, env, tl)
> +DEF_HELPER_2(mtc0_hwrena, void, env, tl)
> +DEF_HELPER_2(mtc0_pwctl, void, env, tl)
> +DEF_HELPER_2(mtc0_count, void, env, tl)
> +DEF_HELPER_2(mtc0_saari, void, env, tl)
> +DEF_HELPER_2(mtc0_saar, void, env, tl)
> +DEF_HELPER_2(mthc0_saar, void, env, tl)
> +DEF_HELPER_2(mtc0_entryhi, void, env, tl)
> +DEF_HELPER_2(mttc0_entryhi, void, env, tl)
> +DEF_HELPER_2(mtc0_compare, void, env, tl)
> +DEF_HELPER_2(mtc0_status, void, env, tl)
> +DEF_HELPER_2(mttc0_status, void, env, tl)
> +DEF_HELPER_2(mtc0_intctl, void, env, tl)
> +DEF_HELPER_2(mtc0_srsctl, void, env, tl)
> +DEF_HELPER_2(mtc0_cause, void, env, tl)
> +DEF_HELPER_2(mttc0_cause, void, env, tl)
> +DEF_HELPER_2(mtc0_ebase, void, env, tl)
> +DEF_HELPER_2(mttc0_ebase, void, env, tl)
> +DEF_HELPER_2(mtc0_config0, void, env, tl)
> +DEF_HELPER_2(mtc0_config2, void, env, tl)
> +DEF_HELPER_2(mtc0_config3, void, env, tl)
> +DEF_HELPER_2(mtc0_config4, void, env, tl)
> +DEF_HELPER_2(mtc0_config5, void, env, tl)
> +DEF_HELPER_2(mtc0_lladdr, void, env, tl)
> +DEF_HELPER_2(mtc0_maar, void, env, tl)
> +DEF_HELPER_2(mthc0_maar, void, env, tl)
> +DEF_HELPER_2(mtc0_maari, void, env, tl)
> +DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
> +DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
> +DEF_HELPER_3(mthc0_watchhi, void, env, tl, i32)
> +DEF_HELPER_2(mtc0_xcontext, void, env, tl)
> +DEF_HELPER_2(mtc0_framemask, void, env, tl)
> +DEF_HELPER_2(mtc0_debug, void, env, tl)
> +DEF_HELPER_2(mttc0_debug, void, env, tl)
> +DEF_HELPER_2(mtc0_performance0, void, env, tl)
> +DEF_HELPER_2(mtc0_errctl, void, env, tl)
> +DEF_HELPER_2(mtc0_taglo, void, env, tl)
> +DEF_HELPER_2(mtc0_datalo, void, env, tl)
> +DEF_HELPER_2(mtc0_taghi, void, env, tl)
> +DEF_HELPER_2(mtc0_datahi, void, env, tl)
> +
> +#if defined(TARGET_MIPS64)
> +DEF_HELPER_2(dmtc0_entrylo0, void, env, i64)
> +DEF_HELPER_2(dmtc0_entrylo1, void, env, i64)
> +#endif
> +
> +/* MIPS MT functions */
> +DEF_HELPER_2(mftgpr, tl, env, i32)
> +DEF_HELPER_2(mftlo, tl, env, i32)
> +DEF_HELPER_2(mfthi, tl, env, i32)
> +DEF_HELPER_2(mftacx, tl, env, i32)
> +DEF_HELPER_1(mftdsp, tl, env)
> +DEF_HELPER_3(mttgpr, void, env, tl, i32)
> +DEF_HELPER_3(mttlo, void, env, tl, i32)
> +DEF_HELPER_3(mtthi, void, env, tl, i32)
> +DEF_HELPER_3(mttacx, void, env, tl, i32)
> +DEF_HELPER_2(mttdsp, void, env, tl)
> +DEF_HELPER_0(dmt, tl)
> +DEF_HELPER_0(emt, tl)
> +DEF_HELPER_1(dvpe, tl, env)
> +DEF_HELPER_1(evpe, tl, env)
> +
> +/* R6 Multi-threading */
> +DEF_HELPER_1(dvp, tl, env)
> +DEF_HELPER_1(evp, tl, env)
> diff --git a/target/mips/cp0_helper.c b/target/mips/tcg/sysemu/cp0_helper.c
> similarity index 100%
> rename from target/mips/cp0_helper.c
> rename to target/mips/tcg/sysemu/cp0_helper.c
> diff --git a/target/mips/mips-semi.c b/target/mips/tcg/sysemu/mips-semi.c
> similarity index 100%
> rename from target/mips/mips-semi.c
> rename to target/mips/tcg/sysemu/mips-semi.c
> diff --git a/target/mips/meson.build b/target/mips/meson.build
> index 9a507937ece..a55af1cd6cf 100644
> --- a/target/mips/meson.build
> +++ b/target/mips/meson.build
> @@ -47,11 +47,6 @@
>
> mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
>
> -mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
> - 'cp0_helper.c',
> - 'mips-semi.c',
> -))
> -
> mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
>
> target_arch += {'mips': mips_ss}
> diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
> index b74fa04303e..2cffc5a5ac6 100644
> --- a/target/mips/tcg/meson.build
> +++ b/target/mips/tcg/meson.build
> @@ -1,3 +1,6 @@
> if have_user
> subdir('user')
> endif
> +if have_system
> + subdir('sysemu')
> +endif
> diff --git a/target/mips/tcg/sysemu/meson.build b/target/mips/tcg/sysemu/meson.build
> new file mode 100644
> index 00000000000..5c3024e7760
> --- /dev/null
> +++ b/target/mips/tcg/sysemu/meson.build
> @@ -0,0 +1,4 @@
> +mips_softmmu_ss.add(files(
> + 'cp0_helper.c',
> + 'mips-semi.c',
> +))
>
next prev parent reply other threads:[~2021-04-18 19:36 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-18 16:31 [PATCH 00/26] target/mips: Re-org to allow KVM-only builds Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 01/26] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-04-18 18:50 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 02/26] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-04-18 18:51 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 03/26] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-04-18 18:54 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 04/26] target/mips: Make CPU/FPU regnames[] arrays global Philippe Mathieu-Daudé
2021-04-18 18:59 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 05/26] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-04-18 19:02 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 06/26] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-04-18 19:08 ` Richard Henderson
2021-04-18 22:46 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 07/26] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-04-18 19:09 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 08/26] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-04-18 19:13 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 09/26] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-04-18 20:43 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 10/26] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-04-18 20:44 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 11/26] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-04-18 19:13 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 12/26] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:15 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 13/26] target/mips: Move code related to physical addressing to sysemu/phys.c Philippe Mathieu-Daudé
2021-04-18 19:30 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 14/26] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:35 ` Richard Henderson [this message]
2021-04-18 22:45 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 15/26] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-04-18 19:35 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 16/26] target/mips: Move tlb_helper.c to tcg/sysemu/ Philippe Mathieu-Daudé
2021-04-18 19:40 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 17/26] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-04-18 19:40 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 18/26] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-04-18 19:47 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 19/26] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-04-18 19:52 ` Richard Henderson
2021-04-18 20:20 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 20/26] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-04-18 20:06 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 21/26] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-04-18 20:23 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 22/26] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-04-18 20:28 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 23/26] target/mips: Move helper.h -> tcg/helper.h.inc Philippe Mathieu-Daudé
2021-04-18 20:34 ` Richard Henderson
2021-04-18 21:20 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 24/26] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-04-18 20:39 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 25/26] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-04-18 20:41 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 26/26] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-04-18 20:42 ` Richard Henderson
2021-04-19 16:00 ` Willian Rampazzo
2021-04-18 16:45 ` [PATCH 00/26] target/mips: Re-org to allow KVM-only builds no-reply
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