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From: Richard Henderson <richard.henderson@linaro.org>
To: cupertinomiranda@gmail.com, qemu-devel@nongnu.org
Cc: shahab@synopsys.com, linux-snps-arc@lists.infradead.org,
	claziss@synopsys.com, cmiranda@synopsys.com
Subject: Re: [PATCH 20/27] arcv3: TCG, decoder glue code and helper changes
Date: Wed, 7 Apr 2021 16:36:34 -0700	[thread overview]
Message-ID: <129d4614-0970-04c6-35b4-3dcadcf619c2@linaro.org> (raw)
In-Reply-To: <20210405143138.17016-21-cupertinomiranda@gmail.com>

On 4/5/21 7:31 AM, cupertinomiranda@gmail.com wrote:
> +uint64_t helper_carry_add_flag32(uint64_t dest, uint64_t b, uint64_t c) {
> +    return carry_add_flag(dest, b, c, 32);
> +}
> +
> +target_ulong helper_overflow_add_flag32(target_ulong dest, target_ulong b, target_ulong c) {
> +    return overflow_add_flag(dest, b, c, 32);
> +}
> +
> +target_ulong helper_overflow_sub_flag32(target_ulong dest, target_ulong b, target_ulong c) {
> +    dest = dest & 0xffffffff;
> +    b = b & 0xffffffff;
> +    c = c & 0xffffffff;
> +    return overflow_sub_flag(dest, b, c, 32);
> +}

You shouldn't need to replicate these functions.  Use the correct types and 
masking in the first place.


> +uint64_t helper_rotate_left32(uint64_t orig, uint64_t n)
> +{
> +    uint64_t t;
> +    uint64_t dest = (orig << n) & ((0xffffffff << n) & 0xffffffff);
> +
> +    t = (orig >> (32 - n)) & ((1 << n) - 1);
> +    dest |= t;
> +
> +    return dest;
> +}
> +
> +uint64_t helper_rotate_right32(uint64_t orig, uint64_t n)
> +{
> +    uint64_t t;
> +    uint64_t dest = (orig >> n) & (0xffffffff >> n);
> +
> +    t = ((orig & ((1 << n) - 1)) << (32 - n));
> +    dest |= t;
> +
> +    return dest;
> +}

rol32 and ror32.

> +uint64_t helper_asr_32(uint64_t b, uint64_t c)
> +{
> +  uint64_t t;
> +  c = c & 31;
> +  t = b;
> +  for(int i = 0; i < c; i++) {
> +    t >>= 1;
> +    if((b & 0x80000000) != 0)
> +      t |= 0x80000000;
> +  }
> +      //t |= ((1 << (c+1)) - 1) << (32 - c);
> +
> +  return t;

Really?  I can't imagine what lead you to write this.
Who writes a simple shift operation with a loop?

Perhaps no helper at all and

   tcg_gen_sra_tl(ret, b, c);
   tcg_gen_ext32s_tl(ret, ret);


> +target_ulong helper_ffs32(CPUARCState *env, uint64_t src)
> +{
> +    int i;
> +    if (src == 0) {
> +      return 31;
> +    }
> +    for (i = 0; i <= 31; i++) {
> +      if (((src >> i) & 1) != 0) {
> +        break;
> +      }
> +    }
> +    return i;
> +}

tcg_gen_ori_tl(ret, src, MAKE_64BIT_MASK(32, 32));
tcg_gen_ctzi_tl(ret, ret, 31);

Though I really wonder if you've got that function correct, as it's not the 
*normal* definition of ffs...


> +target_ulong helper_norml(CPUARCState *env, uint64_t src1)
> +{
> +    int i;
> +    int64_t tmp = (int64_t) src1;
> +    if (tmp == 0 || tmp == -1) {
> +      return 0;
> +    }
> +    for (i = 0; i <= 63; i++) {
> +      if ((tmp >> i) == 0) {
> +          break;
> +      }
> +      if ((tmp >> i) == -1) {
> +          break;
> +      }
> +    }
> +    return i;
> +}

This is some cognate of count-leading-repititions-of-sign-bit, 
tcg_gen_clrsb_tl.  A decent computation should be like

   tcg_gen_clrsb_i64(ret, src);
   tcg_gen_subfi_i64(ret, 63, ret);


> diff --git a/target/arc/semfunc-v2_mapping.def b/target/arc/semfunc-v2_mapping.def
> new file mode 100644
> index 0000000000..ab8d9ff123
> --- /dev/null
> +++ b/target/arc/semfunc-v2_mapping.def

You could have named this properly to start.


r~


  reply	other threads:[~2021-04-07 23:37 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-05 14:31 *** ARC port for review *** cupertinomiranda
2021-04-05 14:31 ` [PATCH 01/27] arc: Add initial core cpu files cupertinomiranda
2021-04-07  0:47   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 02/27] arc: Decoder code cupertinomiranda
2021-04-07  1:25   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 03/27] arc: Opcode definitions table cupertinomiranda
2021-04-05 14:31 ` [PATCH 04/27] arc: TCG and decoder glue code and helpers cupertinomiranda
2021-04-07  2:37   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 05/27] arc: TCG instruction generator and hand-definitions cupertinomiranda
2021-04-07  3:52   ` Richard Henderson
2021-04-07 16:47   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 06/27] arc: semfunc.c tcg code generator cupertinomiranda
2021-04-07 17:14   ` Richard Henderson
2021-04-07 18:33     ` Peter Maydell
2021-04-05 14:31 ` [PATCH 07/27] arc: TCG instruction definitions cupertinomiranda
2021-04-07 19:38   ` Richard Henderson
2021-04-08  0:20   ` Richard Henderson
2021-04-12 14:27     ` Cupertino Miranda
2021-04-05 14:31 ` [PATCH 08/27] arc: Add BCR and AUX registers implementation cupertinomiranda
2021-04-05 14:31 ` [PATCH 09/27] arc: Add IRQ and timer subsystem support cupertinomiranda
2021-04-05 14:31 ` [PATCH 10/27] arc: Add memory management unit (MMU) support cupertinomiranda
2021-04-05 14:31 ` [PATCH 11/27] arc: Add memory protection unit (MPU) support cupertinomiranda
2021-04-05 14:31 ` [PATCH 12/27] arc: Add gdbstub and XML for debugging support cupertinomiranda
2021-04-05 14:31 ` [PATCH 13/27] arc: Add Synopsys ARC emulation boards cupertinomiranda
2021-04-05 14:31 ` [PATCH 14/27] arc: Add support for ARCv2 cupertinomiranda
2021-04-07 20:30   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 15/27] tests/tcg: ARC: Add TCG instruction definition tests cupertinomiranda
2021-04-07 20:38   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 16/27] tests/acceptance: ARC: Add linux boot testing cupertinomiranda
2021-04-07 20:40   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 17/27] arcv3: Core cpu file changes cupertinomiranda
2021-04-05 14:31 ` [PATCH 18/27] arcv3: Decoder code cupertinomiranda
2021-04-07 23:07   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 19/27] arcv3: Opcode definition table cupertinomiranda
2021-04-05 14:31 ` [PATCH 20/27] arcv3: TCG, decoder glue code and helper changes cupertinomiranda
2021-04-07 23:36   ` Richard Henderson [this message]
2021-04-05 14:31 ` [PATCH 21/27] arcv3: TCG instruction generator changes cupertinomiranda
2021-04-07 23:43   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 22/27] arcv3: TCG instruction definitions cupertinomiranda
2021-04-07 23:48   ` Richard Henderson
2021-04-05 14:31 ` [PATCH 23/27] arcv3: BCR and AUX register changes cupertinomiranda
2021-04-05 14:31 ` [PATCH 24/27] arcv3: IRQ changes and new MMUv6 WIP cupertinomiranda
2021-04-05 14:31 ` [PATCH 25/27] arcv3: gdbstub changes and new XML files cupertinomiranda
2021-04-05 14:31 ` [PATCH 26/27] arcv3: board changes cupertinomiranda
2021-04-05 14:31 ` [PATCH 27/27] arcv3: Add support for ARCv3 cupertinomiranda
2021-04-06 23:47 ` *** ARC port for review *** Richard Henderson
2021-04-12 14:25   ` Cupertino Miranda

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