* [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements
@ 2019-08-14 15:12 David Hildenbrand
2019-08-14 15:41 ` Cornelia Huck
2019-08-15 9:00 ` Cornelia Huck
0 siblings, 2 replies; 4+ messages in thread
From: David Hildenbrand @ 2019-08-14 15:12 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, David Hildenbrand, Cornelia Huck, Stefano Brivio,
qemu-s390x, Richard Henderson
Wrong order of operands. The constant always comes last. Makes QEMU crash
reliably on specific git fetch invocations.
Reported-by: Stefano Brivio <sbrivio@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
I guess it is too late for 4.1 :(
---
target/s390x/translate_vx.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 41d5cf869f..0caddb3958 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr,
vec_full_reg_offset(v3), ptr, 16, 16, data, fn)
#define gen_gvec_3i(v1, v2, v3, c, gen) \
tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
- vec_full_reg_offset(v3), c, 16, 16, gen)
+ vec_full_reg_offset(v3), 16, 16, c, gen)
#define gen_gvec_4(v1, v2, v3, v4, gen) \
tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
--
2.21.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements
2019-08-14 15:12 [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements David Hildenbrand
@ 2019-08-14 15:41 ` Cornelia Huck
2019-08-14 15:43 ` David Hildenbrand
2019-08-15 9:00 ` Cornelia Huck
1 sibling, 1 reply; 4+ messages in thread
From: Cornelia Huck @ 2019-08-14 15:41 UTC (permalink / raw)
To: David Hildenbrand
Cc: Thomas Huth, Stefano Brivio, qemu-s390x, qemu-devel, Richard Henderson
On Wed, 14 Aug 2019 17:12:42 +0200
David Hildenbrand <david@redhat.com> wrote:
> Wrong order of operands. The constant always comes last. Makes QEMU crash
> reliably on specific git fetch invocations.
>
> Reported-by: Stefano Brivio <sbrivio@redhat.com>
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>
> I guess it is too late for 4.1 :(
Yup :(
But cc:stable worthy, I guess.
>
> ---
> target/s390x/translate_vx.inc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
> index 41d5cf869f..0caddb3958 100644
> --- a/target/s390x/translate_vx.inc.c
> +++ b/target/s390x/translate_vx.inc.c
> @@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr,
> vec_full_reg_offset(v3), ptr, 16, 16, data, fn)
> #define gen_gvec_3i(v1, v2, v3, c, gen) \
> tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
> - vec_full_reg_offset(v3), c, 16, 16, gen)
> + vec_full_reg_offset(v3), 16, 16, c, gen)
> #define gen_gvec_4(v1, v2, v3, v4, gen) \
> tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
> vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements
2019-08-14 15:41 ` Cornelia Huck
@ 2019-08-14 15:43 ` David Hildenbrand
0 siblings, 0 replies; 4+ messages in thread
From: David Hildenbrand @ 2019-08-14 15:43 UTC (permalink / raw)
To: Cornelia Huck
Cc: Peter Maydell, Thomas Huth, qemu-devel, Stefano Brivio,
qemu-s390x, Richard Henderson
On 14.08.19 17:41, Cornelia Huck wrote:
> On Wed, 14 Aug 2019 17:12:42 +0200
> David Hildenbrand <david@redhat.com> wrote:
>
>> Wrong order of operands. The constant always comes last. Makes QEMU crash
>> reliably on specific git fetch invocations.
>>
>> Reported-by: Stefano Brivio <sbrivio@redhat.com>
>> Signed-off-by: David Hildenbrand <david@redhat.com>
>> ---
>>
>> I guess it is too late for 4.1 :(
>
> Yup :(
>
> But cc:stable worthy, I guess.
>
Yes. Added this bug to
https://wiki.qemu.org/Planning/4.1#Not_yet_fixed_in_any_rc
>>
>> ---
>> target/s390x/translate_vx.inc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
>> index 41d5cf869f..0caddb3958 100644
>> --- a/target/s390x/translate_vx.inc.c
>> +++ b/target/s390x/translate_vx.inc.c
>> @@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr,
>> vec_full_reg_offset(v3), ptr, 16, 16, data, fn)
>> #define gen_gvec_3i(v1, v2, v3, c, gen) \
>> tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
>> - vec_full_reg_offset(v3), c, 16, 16, gen)
>> + vec_full_reg_offset(v3), 16, 16, c, gen)
>> #define gen_gvec_4(v1, v2, v3, v4, gen) \
>> tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
>> vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
>
--
Thanks,
David / dhildenb
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements
2019-08-14 15:12 [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements David Hildenbrand
2019-08-14 15:41 ` Cornelia Huck
@ 2019-08-15 9:00 ` Cornelia Huck
1 sibling, 0 replies; 4+ messages in thread
From: Cornelia Huck @ 2019-08-15 9:00 UTC (permalink / raw)
To: David Hildenbrand
Cc: Thomas Huth, Stefano Brivio, qemu-s390x, qemu-devel, Richard Henderson
On Wed, 14 Aug 2019 17:12:42 +0200
David Hildenbrand <david@redhat.com> wrote:
> Wrong order of operands. The constant always comes last. Makes QEMU crash
> reliably on specific git fetch invocations.
>
> Reported-by: Stefano Brivio <sbrivio@redhat.com>
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>
> I guess it is too late for 4.1 :(
>
> ---
> target/s390x/translate_vx.inc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
> index 41d5cf869f..0caddb3958 100644
> --- a/target/s390x/translate_vx.inc.c
> +++ b/target/s390x/translate_vx.inc.c
> @@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr,
> vec_full_reg_offset(v3), ptr, 16, 16, data, fn)
> #define gen_gvec_3i(v1, v2, v3, c, gen) \
> tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
> - vec_full_reg_offset(v3), c, 16, 16, gen)
> + vec_full_reg_offset(v3), 16, 16, c, gen)
> #define gen_gvec_4(v1, v2, v3, v4, gen) \
> tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
> vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Fixes: 5c4b0ab460ef ("s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT UNDER MASK")
Cc: qemu-stable@nongnu.org
Thanks, applied.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-08-14 15:12 [Qemu-devel] [PATCH v1] s390x/tcg: Fix VERIM with 32/64 bit elements David Hildenbrand
2019-08-14 15:41 ` Cornelia Huck
2019-08-14 15:43 ` David Hildenbrand
2019-08-15 9:00 ` Cornelia Huck
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