From: Simon Veith <sveith@amazon.de>
To: Auger Eric <eric.auger@redhat.com>, <qemu-devel@nongnu.org>,
<qemu-arm@nongnu.org>
Subject: Re: [PATCH 1/5] hw/arm/smmuv3: Apply address mask to linear strtab base address
Date: Thu, 5 Dec 2019 23:04:57 +0100 [thread overview]
Message-ID: <13be5c71-128a-0ae7-1af0-72b58b5958ab@amazon.de> (raw)
In-Reply-To: <0f01a30e-5b27-f97c-903a-a8a2a74a1cdd@redhat.com>
Hello Eric,
On 05/12/2019 09:42, Auger Eric wrote:
> Not related to this patch but I noticed SMMU_BASE_ADDR_MASK should be
> 0xffffffffffc0 and not 0xffffffffffe0. I can fix it separately or if you
> respin, you may fix it as well?
Good catch, thank you. I'll fix it in the next version.
Looking at the upper end of that mask, it seems that we are currently masking out bits 48 through 63, rather than just 51 through 63.
The reference manual says that this should be done to match the system physical address size as given by SMMU_IDR5.OAS.
We define SMMU_IDR5_OAS to be 4, which selects a physical address size of 44 bits (ref. section 6.3.6). I think the mask should therefore be 0xfffffffffc0 to clear bits 44 and above. Do you agree?
Ideally, we would derive this mask from our definition of SMMU_IDR5_OAS, but I'm not sure it's okay to stuff a call to oas2bits() into the SMMU_BASE_ADDR_MASK macro.
Regards
Simon
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Ralf Herbrich
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
next prev parent reply other threads:[~2019-12-05 22:07 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 13:55 [PATCH 0/5] hw/arm/smmuv3: Correct stream ID and event address handling Simon Veith
2019-12-04 13:55 ` [PATCH 1/5] hw/arm/smmuv3: Apply address mask to linear strtab base address Simon Veith
2019-12-05 8:42 ` Auger Eric
2019-12-05 22:04 ` Simon Veith [this message]
2019-12-09 9:14 ` Auger Eric
2019-12-04 13:55 ` [PATCH 2/5] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE Simon Veith
2019-12-05 8:41 ` Auger Eric
2019-12-04 13:55 ` [PATCH 3/5] hw/arm/smmuv3: Align stream table base address to table size Simon Veith
2019-12-05 10:39 ` Auger Eric
2019-12-04 13:55 ` [PATCH 4/5] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro Simon Veith
2019-12-05 8:37 ` Auger Eric
2019-12-04 13:55 ` [PATCH 5/5] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position Simon Veith
2019-12-05 8:39 ` Auger Eric
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=13be5c71-128a-0ae7-1af0-72b58b5958ab@amazon.de \
--to=sveith@amazon.de \
--cc=eric.auger@redhat.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).