From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, aurelien@aurel32.net, peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v2 02/10] target-i386: Introduce mo_stacksize
Date: Thu, 17 Dec 2015 11:19:18 -0800 [thread overview]
Message-ID: <1450379966-28198-3-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1450379966-28198-1-git-send-email-rth@twiddle.net>
Centralize computation of a MO_SIZE for the stack pointer.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-i386/translate.c | 24 ++++++++++--------------
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 3cc17f7..e0df5c0 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -307,6 +307,12 @@ static inline TCGMemOp mo_pushpop(DisasContext *s, TCGMemOp ot)
}
}
+/* Select the size of the stack pointer. */
+static inline TCGMemOp mo_stacksize(DisasContext *s)
+{
+ return CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
+}
+
/* Select only size 64 else 32. Used for SSE operand sizes. */
static inline TCGMemOp mo_64_32(TCGMemOp ot)
{
@@ -2292,31 +2298,22 @@ gen_svm_check_intercept(DisasContext *s, target_ulong pc_start, uint64_t type)
static inline void gen_stack_update(DisasContext *s, int addend)
{
-#ifdef TARGET_X86_64
- if (CODE64(s)) {
- gen_op_add_reg_im(MO_64, R_ESP, addend);
- } else
-#endif
- if (s->ss32) {
- gen_op_add_reg_im(MO_32, R_ESP, addend);
- } else {
- gen_op_add_reg_im(MO_16, R_ESP, addend);
- }
+ gen_op_add_reg_im(mo_stacksize(s), R_ESP, addend);
}
/* Generate a push. It depends on ss32, addseg and dflag. */
static void gen_push_v(DisasContext *s, TCGv val)
{
- TCGMemOp a_ot, d_ot = mo_pushpop(s, s->dflag);
+ TCGMemOp d_ot = mo_pushpop(s, s->dflag);
+ TCGMemOp a_ot = mo_stacksize(s);
int size = 1 << d_ot;
TCGv new_esp = cpu_A0;
tcg_gen_subi_tl(cpu_A0, cpu_regs[R_ESP], size);
if (CODE64(s)) {
- a_ot = MO_64;
+ /* No special handling. */
} else if (s->ss32) {
- a_ot = MO_32;
if (s->addseg) {
new_esp = cpu_tmp4;
tcg_gen_mov_tl(new_esp, cpu_A0);
@@ -2325,7 +2322,6 @@ static void gen_push_v(DisasContext *s, TCGv val)
tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
}
} else {
- a_ot = MO_16;
new_esp = cpu_tmp4;
tcg_gen_ext16u_tl(cpu_A0, cpu_A0);
tcg_gen_mov_tl(new_esp, cpu_A0);
--
2.5.0
next prev parent reply other threads:[~2015-12-17 19:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-17 19:19 [Qemu-devel] [PATCH v2 00/10] target-i386 addressing cleanups Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 01/10] target-i386: Create gen_lea_v_seg Richard Henderson
2015-12-17 19:19 ` Richard Henderson [this message]
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 03/10] target-i386: Use gen_lea_v_seg in gen_lea_modrm Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 04/10] target-i386: Use gen_lea_v_seg in stack subroutines Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 05/10] target-i386: Access segs via TCG registers Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 06/10] target-i386: Use gen_lea_v_seg in pusha/popa Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 07/10] target-i386: Rewrite gen_enter inline Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 08/10] target-i386: Rewrite leave Richard Henderson
2015-12-17 19:19 ` [Qemu-devel] [PATCH v2 09/10] target-i386: Tidy gen_add_A0_im Richard Henderson
2016-02-04 23:44 ` [Qemu-devel] [PATCH v2 00/10] target-i386 addressing cleanups Richard Henderson
2016-02-08 17:04 ` Paolo Bonzini
2016-02-08 20:35 ` Richard Henderson
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