From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
qemu-arm@nongnu.org, patches@linaro.org
Subject: [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps
Date: Fri, 5 Feb 2016 16:45:02 +0000 [thread overview]
Message-ID: <1454690704-16233-5-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1454690704-16233-1-git-send-email-peter.maydell@linaro.org>
Implement trapping of the "debug ROM" registers, which are controlled
by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/helper.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 18e85fd..8c2adbc 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -402,6 +402,24 @@ static CPAccessResult access_tdosa(CPUARMState *env, const ARMCPRegInfo *ri,
return CP_ACCESS_OK;
}
+/* Check for traps to "debug ROM" registers, which are controlled
+ * by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.
+ */
+static CPAccessResult access_tdra(CPUARMState *env, const ARMCPRegInfo *ri,
+ bool isread)
+{
+ int el = arm_current_el(env);
+
+ if (el < 2 && (env->cp15.mdcr_el2 & MDCR_TDRA)
+ && !arm_is_secure_below_el3(env)) {
+ return CP_ACCESS_TRAP_EL2;
+ }
+ if (el < 3 && (env->cp15.mdcr_el3 & MDCR_TDA)) {
+ return CP_ACCESS_TRAP_EL3;
+ }
+ return CP_ACCESS_OK;
+}
+
static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
{
ARMCPU *cpu = arm_env_get_cpu(env);
@@ -3774,12 +3792,15 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
* accessor.
*/
{ .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
- .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
+ .access = PL0_R, .accessfn = access_tdra,
+ .type = ARM_CP_CONST, .resetvalue = 0 },
{ .name = "MDRAR_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 0,
- .access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 0 },
+ .access = PL1_R, .accessfn = access_tdra,
+ .type = ARM_CP_CONST, .resetvalue = 0 },
{ .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
- .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
+ .access = PL0_R, .accessfn = access_tdra,
+ .type = ARM_CP_CONST, .resetvalue = 0 },
/* Monitor debug system control register; the 32-bit alias is DBGDSCRext. */
{ .name = "MDSCR_EL1", .state = ARM_CP_STATE_BOTH,
.cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
--
1.9.1
next prev parent reply other threads:[~2016-02-05 16:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-05 16:44 [Qemu-devel] [PATCH 0/6] target-arm: Implement various EL3 traps Peter Maydell
2016-02-05 16:44 ` [Qemu-devel] [PATCH 1/6] target-arm: correct CNTFRQ access rights Peter Maydell
2016-02-08 15:25 ` Sergey Fedorov
2016-02-08 15:30 ` Peter Maydell
2016-02-05 16:45 ` [Qemu-devel] [PATCH 2/6] target-arm: Fix handling of SCR.SMD Peter Maydell
2016-02-08 15:40 ` [Qemu-devel] [Qemu-arm] " Sergey Fedorov
2016-02-05 16:45 ` [Qemu-devel] [PATCH 3/6] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps Peter Maydell
2016-02-08 15:49 ` [Qemu-devel] [Qemu-arm] " Sergey Fedorov
2016-02-05 16:45 ` Peter Maydell [this message]
2016-02-08 15:56 ` [Qemu-devel] [PATCH 4/6] target-arm: Implement MDCR_EL2.TDRA traps Sergey Fedorov
2016-02-05 16:45 ` [Qemu-devel] [PATCH 5/6] target-arm: Implement MDCR_EL2.TDA and MDCR_EL2.TDA traps Peter Maydell
2016-02-08 16:31 ` Sergey Fedorov
2016-02-08 16:38 ` Peter Maydell
2016-02-08 16:44 ` Sergey Fedorov
2016-02-05 16:45 ` [Qemu-devel] [PATCH 6/6] target-arm: Report correct syndrome for FPEXC32_EL2 traps Peter Maydell
2016-02-08 16:40 ` Sergey Fedorov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1454690704-16233-5-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=edgar.iglesias@gmail.com \
--cc=patches@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).