From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43661) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpE9-0003lF-Od for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aSpE5-0006rX-Ig for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:53 -0500 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]:38172) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpE5-0006r6-Cj for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:49 -0500 Received: by mail-wm0-x230.google.com with SMTP id p63so124741007wmp.1 for ; Mon, 08 Feb 2016 09:03:49 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 8 Feb 2016 18:03:12 +0100 Message-Id: <1454950999-64128-22-git-send-email-pbonzini@redhat.com> In-Reply-To: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> References: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 21/28] target-i386: Use gen_lea_v_seg in pusha/popa List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Richard Henderson From: Richard Henderson More centralization of handling of segment bases. Also fixes the note about 16-bit wrap around not fully handled. Signed-off-by: Richard Henderson Message-Id: <1450379966-28198-7-git-send-email-rth@twiddle.net> Signed-off-by: Paolo Bonzini --- target-i386/translate.c | 50 +++++++++++++++++++++++-------------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 2a6a90a..78168aa 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2298,45 +2298,41 @@ static inline void gen_stack_A0(DisasContext *s) gen_lea_v_seg(s, s->ss32 ? MO_32 : MO_16, cpu_regs[R_ESP], R_SS, -1); } -/* NOTE: wrap around in 16 bit not fully handled */ static void gen_pusha(DisasContext *s) { + TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16; + TCGMemOp d_ot = s->dflag; + int size = 1 << d_ot; int i; - gen_op_movl_A0_reg(R_ESP); - gen_op_addl_A0_im(-(8 << s->dflag)); - if (!s->ss32) - tcg_gen_ext16u_tl(cpu_A0, cpu_A0); - tcg_gen_mov_tl(cpu_T[1], cpu_A0); - if (s->addseg) - gen_op_addl_A0_seg(s, R_SS); - for(i = 0;i < 8; i++) { - gen_op_mov_v_reg(MO_32, cpu_T[0], 7 - i); - gen_op_st_v(s, s->dflag, cpu_T[0], cpu_A0); - gen_op_addl_A0_im(1 << s->dflag); + + for (i = 0; i < 8; i++) { + tcg_gen_addi_tl(cpu_A0, cpu_regs[R_ESP], (i - 8) * size); + gen_lea_v_seg(s, s_ot, cpu_A0, R_SS, -1); + gen_op_st_v(s, d_ot, cpu_regs[7 - i], cpu_A0); } - gen_op_mov_reg_v(MO_16 + s->ss32, R_ESP, cpu_T[1]); + + gen_stack_update(s, -8 * size); } -/* NOTE: wrap around in 16 bit not fully handled */ static void gen_popa(DisasContext *s) { + TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16; + TCGMemOp d_ot = s->dflag; + int size = 1 << d_ot; int i; - gen_op_movl_A0_reg(R_ESP); - if (!s->ss32) - tcg_gen_ext16u_tl(cpu_A0, cpu_A0); - tcg_gen_mov_tl(cpu_T[1], cpu_A0); - tcg_gen_addi_tl(cpu_T[1], cpu_T[1], 8 << s->dflag); - if (s->addseg) - gen_op_addl_A0_seg(s, R_SS); - for(i = 0;i < 8; i++) { + + for (i = 0; i < 8; i++) { /* ESP is not reloaded */ - if (i != 3) { - gen_op_ld_v(s, s->dflag, cpu_T[0], cpu_A0); - gen_op_mov_reg_v(s->dflag, 7 - i, cpu_T[0]); + if (7 - i == R_ESP) { + continue; } - gen_op_addl_A0_im(1 << s->dflag); + tcg_gen_addi_tl(cpu_A0, cpu_regs[R_ESP], i * size); + gen_lea_v_seg(s, s_ot, cpu_A0, R_SS, -1); + gen_op_ld_v(s, d_ot, cpu_T[0], cpu_A0); + gen_op_mov_reg_v(d_ot, 7 - i, cpu_T[0]); } - gen_op_mov_reg_v(MO_16 + s->ss32, R_ESP, cpu_T[1]); + + gen_stack_update(s, 8 * size); } static void gen_enter(DisasContext *s, int esp_addend, int level) -- 1.8.3.1