From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43677) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpEB-0003oj-Ot for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aSpE7-0006sT-Ls for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:55 -0500 Received: from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:35490) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSpE7-0006sM-FT for qemu-devel@nongnu.org; Mon, 08 Feb 2016 12:03:51 -0500 Received: by mail-wm0-x235.google.com with SMTP id c200so25255597wme.0 for ; Mon, 08 Feb 2016 09:03:51 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 8 Feb 2016 18:03:14 +0100 Message-Id: <1454950999-64128-24-git-send-email-pbonzini@redhat.com> In-Reply-To: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> References: <1454950999-64128-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 23/28] target-i386: Rewrite leave List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Richard Henderson From: Richard Henderson Unify the code across stack pointer widths. Fix the note about not updating ESP before the potential exception. Signed-off-by: Richard Henderson Message-Id: <1450379966-28198-9-git-send-email-rth@twiddle.net> Signed-off-by: Paolo Bonzini --- target-i386/translate.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index b2f8790..6b901b1 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2359,6 +2359,20 @@ static void gen_enter(DisasContext *s, int esp_addend, int level) gen_op_mov_reg_v(a_ot, R_ESP, cpu_T[1]); } +static void gen_leave(DisasContext *s) +{ + TCGMemOp d_ot = mo_pushpop(s, s->dflag); + TCGMemOp a_ot = mo_stacksize(s); + + gen_lea_v_seg(s, a_ot, cpu_regs[R_EBP], R_SS, -1); + gen_op_ld_v(s, d_ot, cpu_T[0], cpu_A0); + + tcg_gen_addi_tl(cpu_T[1], cpu_regs[R_EBP], 1 << d_ot); + + gen_op_mov_reg_v(d_ot, R_EBP, cpu_T[0]); + gen_op_mov_reg_v(a_ot, R_ESP, cpu_T[1]); +} + static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip) { gen_update_cc_op(s); @@ -5114,20 +5128,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } break; case 0xc9: /* leave */ - /* XXX: exception not precise (ESP is updated before potential exception) */ - if (CODE64(s)) { - gen_op_mov_v_reg(MO_64, cpu_T[0], R_EBP); - gen_op_mov_reg_v(MO_64, R_ESP, cpu_T[0]); - } else if (s->ss32) { - gen_op_mov_v_reg(MO_32, cpu_T[0], R_EBP); - gen_op_mov_reg_v(MO_32, R_ESP, cpu_T[0]); - } else { - gen_op_mov_v_reg(MO_16, cpu_T[0], R_EBP); - gen_op_mov_reg_v(MO_16, R_ESP, cpu_T[0]); - } - ot = gen_pop_T0(s); - gen_op_mov_reg_v(ot, R_EBP, cpu_T[0]); - gen_pop_update(s, ot); + gen_leave(s); break; case 0x06: /* push es */ case 0x0e: /* push cs */ -- 1.8.3.1