From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48735) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aSxmB-0006wi-TP for qemu-devel@nongnu.org; Mon, 08 Feb 2016 21:11:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aSxm7-0000hU-Rq for qemu-devel@nongnu.org; Mon, 08 Feb 2016 21:11:35 -0500 From: David Gibson Date: Tue, 9 Feb 2016 12:12:21 +1000 Message-Id: <1454983946-32073-3-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1454983946-32073-1-git-send-email-david@gibson.dropbear.id.au> References: <1454983946-32073-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PATCHv2 2/7] target-ppc: Include missing MMU models for SDR1 in info registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: benh@kernel.crashing.org, aik@ozlabs.ru, agraf@suse.de Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson The HMP command "info registers" produces somewhat different information on different ppc cpu variants. For those with a hash MMU it's supposed to include the SDR1, DAR and DSISR registers related to the MMU. However, the switch is missing a couple of MMU model variants, meaning we will miss out this information on certain CPUs which should have it. This patch corrects the oversight. (Really these MMU model IDs need a big cleanup, but we might as well fix the bug in the interim). Signed-off-by: David Gibson Reviewed-by: Alexey Kardashevskiy --- target-ppc/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 0057bda..287d679 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -11352,7 +11352,9 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, case POWERPC_MMU_64B: case POWERPC_MMU_2_03: case POWERPC_MMU_2_06: + case POWERPC_MMU_2_06a: case POWERPC_MMU_2_07: + case POWERPC_MMU_2_07a: #endif cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " DAR " TARGET_FMT_lx " DSISR " TARGET_FMT_lx "\n", env->spr[SPR_SDR1], -- 2.5.0