From: Thomas Huth <thuth@redhat.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Cc: qemu-devel@nongnu.org, laurent@vivier.eu
Subject: [Qemu-devel] [PATCH 4/4] hw/ppc/spapr: Implement the h_page_init hypercall
Date: Wed, 10 Feb 2016 19:09:12 +0100 [thread overview]
Message-ID: <1455127752-17293-5-git-send-email-thuth@redhat.com> (raw)
In-Reply-To: <1455127752-17293-1-git-send-email-thuth@redhat.com>
This hypercall either initializes a page with zeros, or copies
another page.
According to LoPAPR, the i-cache of the page should also be
flushed when using H_ICACHE_INVALIDATE or H_ICACHE_SYNCHRONIZE,
but this is currently only done when running with TCG - assuming
the cache will be flushed with KVM anyway when switching back to
kernel / VM context.
The code currently also does not explicitely flush the data cache
with H_ICACHE_SYNCHRONIZE, since this either also should be done
when switching back to kernel / VM context (with KVM), or not matter
anyway (for TCG).
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
hw/ppc/spapr_hcall.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index f14f849..91e703d 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -387,6 +387,47 @@ static target_ulong h_set_xdabr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
return H_SUCCESS;
}
+static target_ulong h_page_init(PowerPCCPU *cpu, sPAPRMachineState *spapr,
+ target_ulong opcode, target_ulong *args)
+{
+ target_ulong flags = args[0];
+ target_ulong dest = args[1];
+ target_ulong src = args[2];
+ uint8_t buf[TARGET_PAGE_SIZE];
+
+ if (flags & ~(H_ICACHE_SYNCHRONIZE | H_ICACHE_INVALIDATE
+ | H_COPY_PAGE | H_ZERO_PAGE)) {
+ qemu_log_mask(LOG_UNIMP, "h_page_init: Bad flags (" TARGET_FMT_lx "\n",
+ flags);
+ }
+
+ if (!is_ram_address(spapr, dest) || (dest & ~TARGET_PAGE_MASK) != 0) {
+ return H_PARAMETER;
+ }
+
+ if (flags & H_COPY_PAGE) {
+ if (!is_ram_address(spapr, src) || (src & ~TARGET_PAGE_MASK) != 0) {
+ return H_PARAMETER;
+ }
+ cpu_physical_memory_read(src, buf, TARGET_PAGE_SIZE);
+ } else if (flags & H_ZERO_PAGE) {
+ memset(buf, 0, TARGET_PAGE_SIZE);
+ }
+
+ if (flags & (H_COPY_PAGE | H_ZERO_PAGE)) {
+ cpu_physical_memory_write(dest, buf, TARGET_PAGE_SIZE);
+ }
+
+ if (flags & (H_ICACHE_SYNCHRONIZE | H_ICACHE_INVALIDATE)) {
+ if (tcg_enabled()) {
+ tb_flush(CPU(cpu));
+ }
+ /* XXX: Flush data cache for H_ICACHE_SYNCHRONIZE? */
+ }
+
+ return H_SUCCESS;
+}
+
#define FLAGS_REGISTER_VPA 0x0000200000000000ULL
#define FLAGS_REGISTER_DTL 0x0000400000000000ULL
#define FLAGS_REGISTER_SLBSHADOW 0x0000600000000000ULL
@@ -1046,6 +1087,7 @@ static void hypercall_register_types(void)
spapr_register_hypercall(H_SET_SPRG0, h_set_sprg0);
spapr_register_hypercall(H_SET_DABR, h_set_dabr);
spapr_register_hypercall(H_SET_XDABR, h_set_xdabr);
+ spapr_register_hypercall(H_PAGE_INIT, h_page_init);
spapr_register_hypercall(H_SET_MODE, h_set_mode);
/* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate
--
1.8.3.1
next prev parent reply other threads:[~2016-02-10 18:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-10 18:09 [Qemu-devel] [PATCH 0/4] hw/ppc/spapr: Add "Processor Register Hypervisor Resource Access" H-calls Thomas Huth
2016-02-10 18:09 ` [Qemu-devel] [PATCH 1/4] hw/ppc/spapr: Add h_set_sprg0 hypercall Thomas Huth
2016-02-10 23:30 ` David Gibson
2016-02-11 7:12 ` Thomas Huth
2016-02-10 18:09 ` [Qemu-devel] [PATCH 2/4] hw/ppc/spapr: Implement h_set_dabr Thomas Huth
2016-02-10 23:36 ` David Gibson
2016-02-10 18:09 ` [Qemu-devel] [PATCH 3/4] hw/ppc/spapr: Implement the h_set_xdabr hypercall Thomas Huth
2016-02-10 23:37 ` David Gibson
2016-02-10 18:09 ` Thomas Huth [this message]
2016-02-10 23:47 ` [Qemu-devel] [PATCH 4/4] hw/ppc/spapr: Implement the h_page_init hypercall David Gibson
2016-02-11 7:53 ` Thomas Huth
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