From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35423) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTth8-0002BR-QK for qemu-devel@nongnu.org; Thu, 11 Feb 2016 11:02:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTth5-00085w-4A for qemu-devel@nongnu.org; Thu, 11 Feb 2016 11:02:14 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:33703) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTth4-00084N-UV for qemu-devel@nongnu.org; Thu, 11 Feb 2016 11:02:11 -0500 From: Bastian Koppelmann Date: Thu, 11 Feb 2016 17:01:55 +0100 Message-Id: <1455206520-6465-1-git-send-email-kbastian@mail.uni-paderborn.de> Subject: [Qemu-devel] [PATCH 0/5] TriCore exception patches List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: rth@twiddle.net Hi, this series add the infrastructure to generate and handle tricore exceptions and adds three types of exceptions (context management,illegal opcodes, and register-pair) which I tested so far. However more patches will follow that add the missing exceptions that make sense to QEMU. Cheers, Bastian Bastian Koppelmann (5): target-tricore: Add trap handling target-tricore: Save the pc before CSA operations for exceptions target-tricore: add context managment trap generation target-tricore: add illegal opcode trap generation target-tricore: add opd trap generation target-tricore/cpu-qom.h | 2 +- target-tricore/cpu.c | 2 +- target-tricore/cpu.h | 1 + target-tricore/helper.c | 52 +++++ target-tricore/helper.h | 3 + target-tricore/op_helper.c | 103 +++++++++- target-tricore/translate.c | 495 ++++++++++++++++++++++++++++++++++++++++++--- 7 files changed, 626 insertions(+), 32 deletions(-) -- 2.7.1