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[97.126.123.70]) by smtp.gmail.com with ESMTPSA id z16sm7818157pff.125.2020.02.14.12.42.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Feb 2020 12:42:45 -0800 (PST) Subject: Re: [PATCH v2 21/21] target/arm: Correctly implement ACTLR2, HACTLR2 To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20200214175116.9164-1-peter.maydell@linaro.org> <20200214175116.9164-22-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <14cff2f3-a832-1018-4f1f-23ae889500f1@linaro.org> Date: Fri, 14 Feb 2020 12:42:43 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200214175116.9164-22-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Auger , Aaron Lindsay , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/14/20 9:51 AM, Peter Maydell wrote: > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index c46bb5a5c09..9f618e120aa 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -2718,6 +2718,7 @@ static void arm_max_initfn(Object *obj) > > t = cpu->isar.id_mmfr4; > t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */ > + t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */ > cpu->isar.id_mmfr4 = t; > } > #endif > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 8430d432943..32cf8ee98b0 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -703,6 +703,10 @@ static void aarch64_max_initfn(Object *obj) > u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */ > cpu->isar.id_mmfr3 = u; > > + u = cpu->isar.id_mmfr4; > + u = FIELD_DP32(u, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 implemented */ > + cpu->isar.id_mmfr4 = u; This highlights a missing set of HPDS for cpu64 max. Saying "implemented" is somewhat redundant. Otherwise, Reviewed-by: Richard Henderson r~