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Tsirkin" References: <20210402075520.65871-1-jasowang@redhat.com> <20210402053122-mutt-send-email-mst@kernel.org> From: Jason Wang Message-ID: <150d36d8-a43f-4b24-4c5e-6ebdaad98edb@redhat.com> Date: Tue, 6 Apr 2021 11:54:29 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: <20210402053122-mutt-send-email-mst@kernel.org> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jasowang@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=jasowang@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, MIME_CHARSET_FARAWAY=2.45, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, qemu-devel@nongnu.org, qemu-stable@nongnu.org, Peter Xu , "Dr . David Alan Gilbert" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" ÔÚ 2021/4/2 ÏÂÎç5:31, Michael S. Tsirkin дµÀ: > On Fri, Apr 02, 2021 at 03:55:20PM +0800, Jason Wang wrote: >> Commit 4c70875372b8 ("pci: advertise a page aligned ATS") advertises >> the page aligned via ATS capability (RO) to unbrek recent Linux IOMMU >> drivers since 5.2. But it forgot the compat the capability which >> breaks the migration from old machine type: >> >> (qemu) qemu-kvm: get_pci_config_device: Bad config data: i=0x104 read: >> 0 device: 20 cmask: ff wmask: 0 w1cmask:0 >> >> This patch introduces a new parameter "ats_page_aligned" for >> virtio-pci device and turn it on for machine type which is newer than >> 5.1. >> >> Cc: Michael S. Tsirkin >> Cc: Peter Xu >> Cc: Dr. David Alan Gilbert >> Cc: qemu-stable@nongnu.org >> Fixes: 4c70875372b8 ("pci: advertise a page aligned ATS") >> Signed-off-by: Jason Wang > I think x-ats-page-aligned would be a better name. Right, will post V2. Thanks > > >> --- >> hw/core/machine.c | 1 + >> hw/pci/pcie.c | 10 ++++++---- >> hw/virtio/virtio-pci.c | 5 ++++- >> hw/virtio/virtio-pci.h | 5 +++++ >> include/hw/pci/pcie.h | 2 +- >> 5 files changed, 17 insertions(+), 6 deletions(-) >> >> diff --git a/hw/core/machine.c b/hw/core/machine.c >> index 9935c6ddd5..ad4459b0f2 100644 >> --- a/hw/core/machine.c >> +++ b/hw/core/machine.c >> @@ -53,6 +53,7 @@ GlobalProperty hw_compat_5_1[] = { >> { "nvme", "use-intel-id", "on"}, >> { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ >> { "pl011", "migrate-clk", "off" }, >> + { "virtio-pci", "ats_page_aligned", "off"}, >> }; >> const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); >> >> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c >> index a733e2fb87..fd0fa157e8 100644 >> --- a/hw/pci/pcie.c >> +++ b/hw/pci/pcie.c >> @@ -963,16 +963,18 @@ void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num) >> pci_set_quad(dev->config + offset + pci_dsn_cap, ser_num); >> } >> >> -void pcie_ats_init(PCIDevice *dev, uint16_t offset) >> +void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned) >> { >> pcie_add_capability(dev, PCI_EXT_CAP_ID_ATS, 0x1, >> offset, PCI_EXT_CAP_ATS_SIZEOF); >> >> dev->exp.ats_cap = offset; >> >> - /* Invalidate Queue Depth 0, Page Aligned Request 1 */ >> - pci_set_word(dev->config + offset + PCI_ATS_CAP, >> - PCI_ATS_CAP_PAGE_ALIGNED); >> + /* Invalidate Queue Depth 0 */ >> + if (aligned) { >> + pci_set_word(dev->config + offset + PCI_ATS_CAP, >> + PCI_ATS_CAP_PAGE_ALIGNED); >> + } >> /* STU 0, Disabled by default */ >> pci_set_word(dev->config + offset + PCI_ATS_CTRL, 0); >> >> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c >> index 883045a223..ebe9716acf 100644 >> --- a/hw/virtio/virtio-pci.c >> +++ b/hw/virtio/virtio-pci.c >> @@ -1848,7 +1848,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) >> } >> >> if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { >> - pcie_ats_init(pci_dev, last_pcie_cap_offset); >> + pcie_ats_init(pci_dev, last_pcie_cap_offset, >> + proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED); >> last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; >> } >> >> @@ -1925,6 +1926,8 @@ static Property virtio_pci_properties[] = { >> ignore_backend_features, false), >> DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, >> VIRTIO_PCI_FLAG_ATS_BIT, false), >> + DEFINE_PROP_BIT("ats_page_aligned", VirtIOPCIProxy, flags, >> + VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true), >> DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, >> VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), >> DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, >> diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h >> index d7d5d403a9..2446dcd9ae 100644 >> --- a/hw/virtio/virtio-pci.h >> +++ b/hw/virtio/virtio-pci.h >> @@ -42,6 +42,7 @@ enum { >> VIRTIO_PCI_FLAG_INIT_PM_BIT, >> VIRTIO_PCI_FLAG_INIT_FLR_BIT, >> VIRTIO_PCI_FLAG_AER_BIT, >> + VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, >> }; >> >> /* Need to activate work-arounds for buggy guests at vmstate load. */ >> @@ -84,6 +85,10 @@ enum { >> /* Advanced Error Reporting capability */ >> #define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT) >> >> +/* Page Aligned Address space Translation Service */ >> +#define VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED \ >> + (1 << VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT) >> + >> typedef struct { >> MSIMessage msg; >> int virq; >> diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h >> index 14c58ebdb6..6063bee0ec 100644 >> --- a/include/hw/pci/pcie.h >> +++ b/include/hw/pci/pcie.h >> @@ -137,7 +137,7 @@ void pcie_acs_reset(PCIDevice *dev); >> >> void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn); >> void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num); >> -void pcie_ats_init(PCIDevice *dev, uint16_t offset); >> +void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned); >> >> void pcie_cap_slot_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, >> Error **errp); >> -- >> 2.24.3 (Apple Git-128)