From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48745) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFdZj-0006Jh-Ob for qemu-devel@nongnu.org; Thu, 25 Oct 2018 07:13:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFdZU-0000fH-NB for qemu-devel@nongnu.org; Thu, 25 Oct 2018 07:13:05 -0400 From: Peng Hao Date: Fri, 26 Oct 2018 03:23:15 +0800 Message-Id: <1540495397-88089-4-git-send-email-peng.hao2@zte.com.cn> In-Reply-To: <1540495397-88089-1-git-send-email-peng.hao2@zte.com.cn> References: <1540495397-88089-1-git-send-email-peng.hao2@zte.com.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, philmd@redhat.com Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, Peng Hao Signed-off-by: Peng Hao Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++-----= ---- include/hw/misc/pvpanic.h | 2 ++ 2 files changed, 62 insertions(+), 14 deletions(-) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index dd3aef2..b575e01 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -2,10 +2,12 @@ * QEMU simulated pvpanic device. * * Copyright Fujitsu, Corp. 2013 + * Copyright (c) 2018 ZTE Ltd. * * Authors: * Wen Congyang * Hu Tao + * Peng Hao * * This work is licensed under the terms of the GNU GPL, version 2 or late= r. * See the COPYING file in the top-level directory. @@ -45,30 +47,48 @@ static void handle=5Fevent(int event) =20 #include "hw/isa/isa.h" =20 -typedef struct PVPanicState { +typedef struct PVPanicCommonState { + MemoryRegion mr; +} PVPanicCommonState; + +typedef struct PVPanicISAState { /* private */ ISADevice isadev; + uint16=5Ft ioport; + /* public */ + PVPanicCommonState common; +} PVPanicISAState; + +typedef struct PVPanicMMIOState { + /* private */ + SysBusDevice busdev; =20 /* public */ - MemoryRegion mr; - uint16=5Ft ioport; -} PVPanicState; + PVPanicCommonState common; +} PVPanicMMIOState; + +#define PVPANIC=5FISA(obj) \ + OBJECT=5FCHECK(PVPanicISAState, (obj), TYPE=5FPVPANIC) + +#define PVPANIC=5FMMIO(obj) \ + OBJECT=5FCHECK(PVPanicMMIOState, (obj), TYPE=5FPVPANIC=5FMMIO) + =20 /* return supported events on read */ -static uint64=5Ft pvpanic=5Fioport=5Fread(void *opaque, hwaddr addr, unsig= ned size) +static uint64=5Ft pvpanic=5Fread(void *opaque, hwaddr addr, unsigned size) { return PVPANIC=5FPANICKED; } =20 -static void pvpanic=5Fioport=5Fwrite(void *opaque, hwaddr addr, uint64=5Ft= val, +static void pvpanic=5Fwrite(void *opaque, hwaddr addr, uint64=5Ft val, unsigned size) { handle=5Fevent(val); } =20 static const MemoryRegionOps pvpanic=5Fops =3D { - .read =3D pvpanic=5Fioport=5Fread, - .write =3D pvpanic=5Fioport=5Fwrite, + .read =3D pvpanic=5Fread, + .write =3D pvpanic=5Fwrite, .impl =3D { .min=5Faccess=5Fsize =3D 1, .max=5Faccess=5Fsize =3D 1, @@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic=5Fops =3D { =20 static void pvpanic=5Fisa=5Finitfn(Object *obj) { - PVPanicState *s =3D PVPANIC(obj); + PVPanicISAState *s =3D PVPANIC=5FISA(obj); =20 - memory=5Fregion=5Finit=5Fio(&s->mr, OBJECT(s), &pvpanic=5Fops, s, "pvp= anic", 1); + memory=5Fregion=5Finit=5Fio(&s->common.mr, OBJECT(s), &pvpanic=5Fops, = s, TYPE=5FPVPANIC, 1); } =20 static void pvpanic=5Fisa=5Frealizefn(DeviceState *dev, Error **errp) { ISADevice *d =3D ISA=5FDEVICE(dev); - PVPanicState *s =3D PVPANIC(dev); + PVPanicISAState *s =3D PVPANIC=5FISA(dev); FWCfgState *fw=5Fcfg =3D fw=5Fcfg=5Ffind(); uint16=5Ft *pvpanic=5Fport; =20 @@ -98,11 +118,11 @@ static void pvpanic=5Fisa=5Frealizefn(DeviceState *dev= , Error **errp) fw=5Fcfg=5Fadd=5Ffile(fw=5Fcfg, "etc/pvpanic-port", pvpanic=5Fport, sizeof(*pvpanic=5Fport)); =20 - isa=5Fregister=5Fioport(d, &s->mr, s->ioport); + isa=5Fregister=5Fioport(d, &s->common.mr, s->ioport); } =20 static Property pvpanic=5Fisa=5Fproperties[] =3D { - DEFINE=5FPROP=5FUINT16(PVPANIC=5FIOPORT=5FPROP, PVPanicState, ioport, = 0x505), + DEFINE=5FPROP=5FUINT16(PVPANIC=5FIOPORT=5FPROP, PVPanicISAState, iopor= t, 0x505), DEFINE=5FPROP=5FEND=5FOF=5FLIST(), }; =20 @@ -118,14 +138,40 @@ static void pvpanic=5Fisa=5Fclass=5Finit(ObjectClass = *klass, void *data) static TypeInfo pvpanic=5Fisa=5Finfo =3D { .name =3D TYPE=5FPVPANIC, .parent =3D TYPE=5FISA=5FDEVICE, - .instance=5Fsize =3D sizeof(PVPanicState), + .instance=5Fsize =3D sizeof(PVPanicISAState), .instance=5Finit =3D pvpanic=5Fisa=5Finitfn, .class=5Finit =3D pvpanic=5Fisa=5Fclass=5Finit, }; =20 +static void pvpanic=5Fmmio=5Finitfn(Object *obj) +{ + PVPanicMMIOState *s =3D PVPANIC=5FMMIO(obj); + SysBusDevice *sbd =3D SYS=5FBUS=5FDEVICE(obj); + + memory=5Fregion=5Finit=5Fio(&s->common.mr, OBJECT(s), &pvpanic=5Fops, = s, + TYPE=5FPVPANIC=5FMMIO, 2); + sysbus=5Finit=5Fmmio(sbd, &s->common.mr); +} + +static void pvpanic=5Fmmio=5Fclass=5Finit(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE=5FCLASS(klass); + + set=5Fbit(DEVICE=5FCATEGORY=5FMISC, dc->categories); +} + +static TypeInfo pvpanic=5Fmmio=5Finfo =3D { + .name =3D TYPE=5FPVPANIC=5FMMIO, + .parent =3D TYPE=5FSYS=5FBUS=5FDEVICE, + .instance=5Fsize =3D sizeof(PVPanicMMIOState), + .instance=5Finit =3D pvpanic=5Fmmio=5Finitfn, + .class=5Finit =3D pvpanic=5Fmmio=5Fclass=5Finit, +}; + static void pvpanic=5Fregister=5Ftypes(void) { type=5Fregister=5Fstatic(&pvpanic=5Fisa=5Finfo); + type=5Fregister=5Fstatic(&pvpanic=5Fmmio=5Finfo); } =20 type=5Finit(pvpanic=5Fregister=5Ftypes) diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 1ee071a..c0d2d38 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -16,6 +16,8 @@ =20 #define TYPE=5FPVPANIC "pvpanic" =20 +#define TYPE=5FPVPANIC=5FMMIO "pvpanic-mmio" + #define PVPANIC=5FIOPORT=5FPROP "ioport" =20 static inline uint16=5Ft pvpanic=5Fport(void) --=20 1.8.3.1