* [Qemu-devel] [PATCH RESEND v15 01/10] ACPI: add some GHES structures and macros definition
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 02/10] acpi: add build_append_ghes_notify() helper for Hardware Error Notification Dongjiu Geng
` (10 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
Add Generic Error Status Block structures and some macros
definitions, which is referred to the ACPI 4.0 or ACPI 6.2. The
HEST table generation and CPER record will use them.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Change since v14:
Thanks Igor's review and comments
1. Update spec comment for AcpiHestNotifyType
2. drop () for the macro definition
Change since v13:
1. Clean the new added structures and macros definition
Change since v12:
1. Address Igor's comments to to get rid of most structures and use
build_append_int_noprefix() API to compose whole error status block
and APEI table in [1]
[1]: https://lkml.org/lkml/2017/8/29/187
---
include/hw/acpi/acpi-defs.h | 52 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index af8e023..f85cf98 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -226,6 +226,25 @@ typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
#define ACPI_APIC_RESERVED 16 /* 16 and greater are reserved */
/*
+ * Values for Hardware Error Notification Type field
+ */
+enum AcpiHestNotifyType {
+ ACPI_HEST_NOTIFY_POLLED = 0,
+ ACPI_HEST_NOTIFY_EXTERNAL = 1,
+ ACPI_HEST_NOTIFY_LOCAL = 2,
+ ACPI_HEST_NOTIFY_SCI = 3,
+ ACPI_HEST_NOTIFY_NMI = 4,
+ ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0: 18.3.2.7, Table 18-290 */
+ ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0: 18.3.2.7, Table 18-290 */
+ ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0: 18.3.2.7, Table 18-332 */
+ ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1: 18.3.2.9, Table 18-345 */
+ ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1: 18.3.2.9, Table 18-345 */
+ ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1: 18.3.2.9, Table 18-345 */
+ ACPI_HEST_NOTIFY_SDEI = 11, /* ACPI 6.2: 18.3.2.9, Table 18-383 */
+ ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
+};
+
+/*
* MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
*/
#define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\
@@ -402,6 +421,39 @@ struct AcpiSystemResourceAffinityTable {
} QEMU_PACKED;
typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
+/*
+ * Generic Error Status Block
+ */
+struct AcpiGenericErrorStatus {
+ /* It is a bitmask composed of ACPI_GEBS_xxx macros */
+ uint32_t block_status;
+ uint32_t raw_data_offset;
+ uint32_t raw_data_length;
+ uint32_t data_length;
+ uint32_t error_severity;
+} QEMU_PACKED;
+typedef struct AcpiGenericErrorStatus AcpiGenericErrorStatus;
+
+/*
+ * Masks for block_status flags above
+ */
+#define ACPI_GEBS_UNCORRECTABLE 1
+
+/*
+ * Values for error_severity field above
+ */
+enum AcpiGenericErrorSeverity {
+ ACPI_CPER_SEV_RECOVERABLE,
+ ACPI_CPER_SEV_FATAL,
+ ACPI_CPER_SEV_CORRECTED,
+ ACPI_CPER_SEV_NONE,
+};
+
+/*
+ * Generic Hardware Error Source version 2
+ */
+#define ACPI_HEST_SOURCE_GENERIC_ERROR_V2 10
+
#define ACPI_SRAT_PROCESSOR_APIC 0
#define ACPI_SRAT_MEMORY 1
#define ACPI_SRAT_PROCESSOR_x2APIC 2
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 02/10] acpi: add build_append_ghes_notify() helper for Hardware Error Notification
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 01/10] ACPI: add some GHES structures and macros definition Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 03/10] acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry Dongjiu Geng
` (9 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
It will help to add Hardware Error Notification to ACPI tables
without using packed C structures and avoid endianness
issues as API doesn't need explicit conversion.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
hw/acpi/aml-build.c | 22 ++++++++++++++++++++++
include/hw/acpi/aml-build.h | 8 ++++++++
2 files changed, 30 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 1e43cd7..4210c36 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -274,6 +274,28 @@ void build_append_gas(GArray *table, AmlAddressSpace as,
build_append_int_noprefix(table, address, 8);
}
+/* Hardware Error Notification
+ * ACPI 4.0: 17.3.2.7 Hardware Error Notification
+ */
+void build_append_ghes_notify(GArray *table, const uint8_t type,
+ uint8_t length, uint16_t config_write_enable,
+ uint32_t poll_interval, uint32_t vector,
+ uint32_t polling_threshold_value,
+ uint32_t polling_threshold_window,
+ uint32_t error_threshold_value,
+ uint32_t error_threshold_window)
+{
+ build_append_int_noprefix(table, type, 1); /* type */
+ build_append_int_noprefix(table, length, 1);
+ build_append_int_noprefix(table, config_write_enable, 2);
+ build_append_int_noprefix(table, poll_interval, 4);
+ build_append_int_noprefix(table, vector, 4);
+ build_append_int_noprefix(table, polling_threshold_value, 4);
+ build_append_int_noprefix(table, polling_threshold_window, 4);
+ build_append_int_noprefix(table, error_threshold_value, 4);
+ build_append_int_noprefix(table, error_threshold_window, 4);
+}
+
/*
* Build NAME(XXXX, 0x00000000) where 0x00000000 is encoded as a dword,
* and return the offset to 0x00000000 for runtime patching.
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 6c36903..a005052 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -409,6 +409,14 @@ build_append_gas_from_struct(GArray *table, const struct AcpiGenericAddress *s)
s->access_width, s->address);
}
+void build_append_ghes_notify(GArray *table, const uint8_t type,
+ uint8_t length, uint16_t config_write_enable,
+ uint32_t poll_interval, uint32_t vector,
+ uint32_t polling_threshold_value,
+ uint32_t polling_threshold_window,
+ uint32_t error_threshold_value,
+ uint32_t error_threshold_window);
+
void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
uint64_t len, int node, MemoryAffinityFlags flags);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 03/10] acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 01/10] ACPI: add some GHES structures and macros definition Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 02/10] acpi: add build_append_ghes_notify() helper for Hardware Error Notification Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 04/10] acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block Dongjiu Geng
` (8 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
It will help to add Generic Error Data Entry to ACPI tables
without using packed C structures and avoid endianness
issues as API doesn't need explicit conversion.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
hw/acpi/aml-build.c | 32 ++++++++++++++++++++++++++++++++
include/hw/acpi/aml-build.h | 6 ++++++
2 files changed, 38 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 4210c36..00b166e 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -296,6 +296,38 @@ void build_append_ghes_notify(GArray *table, const uint8_t type,
build_append_int_noprefix(table, error_threshold_window, 4);
}
+/* Generic Error Data Entry
+ * ACPI 4.0: 17.3.2.6.1 Generic Error Data
+ */
+void build_append_ghes_generic_data(GArray *table, const char *section_type,
+ uint32_t error_severity, uint16_t revision,
+ uint8_t validation_bits, uint8_t flags,
+ uint32_t error_data_length, uint8_t *fru_id,
+ uint8_t *fru_text, uint64_t time_stamp)
+{
+ int i;
+
+ for (i = 0; i < 16; i++) {
+ build_append_int_noprefix(table, section_type[i], 1);
+ }
+
+ build_append_int_noprefix(table, error_severity, 4);
+ build_append_int_noprefix(table, revision, 2);
+ build_append_int_noprefix(table, validation_bits, 1);
+ build_append_int_noprefix(table, flags, 1);
+ build_append_int_noprefix(table, error_data_length, 4);
+
+ for (i = 0; i < 16; i++) {
+ build_append_int_noprefix(table, fru_id[i], 1);
+ }
+
+ for (i = 0; i < 20; i++) {
+ build_append_int_noprefix(table, fru_text[i], 1);
+ }
+
+ build_append_int_noprefix(table, time_stamp, 8);
+}
+
/*
* Build NAME(XXXX, 0x00000000) where 0x00000000 is encoded as a dword,
* and return the offset to 0x00000000 for runtime patching.
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index a005052..147eb38 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -417,6 +417,12 @@ void build_append_ghes_notify(GArray *table, const uint8_t type,
uint32_t error_threshold_value,
uint32_t error_threshold_window);
+void build_append_ghes_generic_data(GArray *table, const char *section_type,
+ uint32_t error_severity, uint16_t revision,
+ uint8_t validation_bits, uint8_t flags,
+ uint32_t error_data_length, uint8_t *fru_id,
+ uint8_t *fru_text, uint64_t time_stamp);
+
void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
uint64_t len, int node, MemoryAffinityFlags flags);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 04/10] acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (2 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 03/10] acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 05/10] ACPI: Add APEI GHES table generation and CPER record support Dongjiu Geng
` (7 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
It will help to add Generic Error Status Block to ACPI tables
without using packed C structures and avoid endianness
issues as API doesn't need explicit conversion.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
hw/acpi/aml-build.c | 14 ++++++++++++++
include/hw/acpi/aml-build.h | 6 ++++++
2 files changed, 20 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 00b166e..5923248 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -296,6 +296,20 @@ void build_append_ghes_notify(GArray *table, const uint8_t type,
build_append_int_noprefix(table, error_threshold_window, 4);
}
+/* Generic Error Status Block
+ * ACPI 4.0: 17.3.2.6.1 Generic Error Data
+ */
+void build_append_ghes_generic_status(GArray *table, uint32_t block_status,
+ uint32_t raw_data_offset, uint32_t raw_data_length,
+ uint32_t data_length, uint32_t error_severity)
+{
+ build_append_int_noprefix(table, block_status, 4);
+ build_append_int_noprefix(table, raw_data_offset, 4);
+ build_append_int_noprefix(table, raw_data_length, 4);
+ build_append_int_noprefix(table, data_length, 4);
+ build_append_int_noprefix(table, error_severity, 4);
+}
+
/* Generic Error Data Entry
* ACPI 4.0: 17.3.2.6.1 Generic Error Data
*/
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 147eb38..657a0d5 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -423,6 +423,12 @@ void build_append_ghes_generic_data(GArray *table, const char *section_type,
uint32_t error_data_length, uint8_t *fru_id,
uint8_t *fru_text, uint64_t time_stamp);
+void
+build_append_ghes_generic_status(GArray *table, uint32_t block_status,
+ uint32_t raw_data_offset,
+ uint32_t raw_data_length,
+ uint32_t data_length, uint32_t error_severity);
+
void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
uint64_t len, int node, MemoryAffinityFlags flags);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 05/10] ACPI: Add APEI GHES table generation and CPER record support
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (3 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 04/10] acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 06/10] docs: APEI GHES generation and CPER record description Dongjiu Geng
` (6 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
This implements APEI GHES Table generation and record CPER in
runtime via fw_cfg blobs.Now we only support two types of GHESv2,
which are GPIO-Signal and ARMv8 SEA. Afterwards, we can extend the
supported types if needed. For the CPER section type, currently it
is memory section because kernel mainly wants userspace to handle
the memory errors.
For GHESv2 error source, the OSPM must acknowledges the error via
Read ACK register. So user space must check the ACK value before
recording a new CPER to avoid read-write race condition.
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
The basic solution is suggested by Laszlo in [1]
[1]: https://lkml.org/lkml/2017/3/29/342
---
default-configs/arm-softmmu.mak | 1 +
hw/acpi/Makefile.objs | 1 +
hw/acpi/acpi_ghes.c | 171 ++++++++++++++++++++++++++++++++++++++++
hw/acpi/aml-build.c | 2 +
hw/arm/virt-acpi-build.c | 8 ++
include/hw/acpi/acpi_ghes.h | 82 +++++++++++++++++++
include/hw/acpi/aml-build.h | 1 +
7 files changed, 266 insertions(+)
create mode 100644 hw/acpi/acpi_ghes.c
create mode 100644 include/hw/acpi/acpi_ghes.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..7ea9857 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_ACPI_APEI=y
diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs
index 11c35bc..209febf 100644
--- a/hw/acpi/Makefile.objs
+++ b/hw/acpi/Makefile.objs
@@ -6,6 +6,7 @@ common-obj-$(CONFIG_ACPI_MEMORY_HOTPLUG) += memory_hotplug.o
common-obj-$(CONFIG_ACPI_CPU_HOTPLUG) += cpu.o
common-obj-$(CONFIG_ACPI_NVDIMM) += nvdimm.o
common-obj-$(CONFIG_ACPI_VMGENID) += vmgenid.o
+common-obj-$(CONFIG_ACPI_APEI) += acpi_ghes.o
common-obj-$(call lnot,$(CONFIG_ACPI_X86)) += acpi-stub.o
common-obj-y += acpi_interface.o
diff --git a/hw/acpi/acpi_ghes.c b/hw/acpi/acpi_ghes.c
new file mode 100644
index 0000000..d03e797
--- /dev/null
+++ b/hw/acpi/acpi_ghes.c
@@ -0,0 +1,171 @@
+/* Support for generating APEI tables and record CPER for Guests
+ *
+ * Copyright (C) 2017 HuaWei Corporation.
+ *
+ * Author: Dongjiu Geng <gengdongjiu@huawei.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/acpi/acpi.h"
+#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_ghes.h"
+#include "hw/nvram/fw_cfg.h"
+#include "sysemu/sysemu.h"
+#include "qemu/error-report.h"
+
+/* Build table for the hardware error fw_cfg blob */
+void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linker)
+{
+ int i;
+
+ /*
+ * | +--------------------------+
+ * | | error_block_address |
+ * | | .......... |
+ * | +--------------------------+
+ * | | read_ack_register |
+ * | | ........... |
+ * | +--------------------------+
+ * | | Error Status Data Block |
+ * | | ........ |
+ * | +--------------------------+
+ */
+
+ /* Build error_block_address */
+ build_append_int_noprefix((void *)hardware_errors, 0,
+ GHES_ADDRESS_SIZE * ACPI_HEST_ERROR_SOURCE_COUNT);
+
+ /* Build read_ack_register */
+ for (i = 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++)
+ /* Initialize the value of read_ack_register to 1, so GHES can be
+ * writeable in the first time
+ */
+ build_append_int_noprefix((void *)hardware_errors, 1, GHES_ADDRESS_SIZE);
+
+ /* Build Error Status Data Block */
+ build_append_int_noprefix((void *)hardware_errors, 0,
+ GHES_MAX_RAW_DATA_LENGTH * ACPI_HEST_ERROR_SOURCE_COUNT);
+
+ /* Allocate guest memory for the hardware error fw_cfg blob */
+ bios_linker_loader_alloc(linker, GHES_ERRORS_FW_CFG_FILE, hardware_errors,
+ 1, false);
+}
+
+/* Build Hardware Error Source Table */
+void build_apei_hest(GArray *table_data, GArray *hardware_errors,
+ BIOSLinker *linker)
+{
+ uint32_t i, error_status_block_offset, length = table_data->len;
+
+ /* Reserve Hardware Error Source Table header size */
+ acpi_data_push(table_data, sizeof(AcpiTableHeader));
+
+ /* Set the error source counts */
+ build_append_int_noprefix(table_data, ACPI_HEST_ERROR_SOURCE_COUNT, 4);
+
+ for (i = 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++) {
+ /* Generic Hardware Error Source version 2(GHESv2 - Type 10)
+ */
+ build_append_int_noprefix(table_data,
+ ACPI_HEST_SOURCE_GENERIC_ERROR_V2, 2); /* type */
+ build_append_int_noprefix(table_data, cpu_to_le16(i), 2); /* source id */
+ build_append_int_noprefix(table_data, 0xffff, 2); /* related source id */
+ build_append_int_noprefix(table_data, 0, 1); /* flags */
+
+ build_append_int_noprefix(table_data, 1, 1); /* enabled */
+
+ /* Number of Records To Pre-allocate */
+ build_append_int_noprefix(table_data, 1, 4);
+ /* Max Sections Per Record */
+ build_append_int_noprefix(table_data, 1, 4);
+ /* Max Raw Data Length */
+ build_append_int_noprefix(table_data, GHES_MAX_RAW_DATA_LENGTH, 4);
+
+ /* Build error status address*/
+ build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0);
+ bios_linker_loader_add_pointer(linker,
+ ACPI_BUILD_TABLE_FILE, ERROR_STATUS_ADDRESS_OFFSET(length, i),
+ GHES_ADDRESS_SIZE, GHES_ERRORS_FW_CFG_FILE, i * GHES_ADDRESS_SIZE);
+
+ /* Build Hardware Error Notification
+ * Now only enable GPIO-Signal and ARMv8 SEA notification types
+ */
+ if (i == 0) {
+ build_append_ghes_notify(table_data, ACPI_HEST_NOTIFY_GPIO, 28,
+ 0, 0, 0, 0, 0, 0, 0);
+ } else if (i == 1) {
+ build_append_ghes_notify(table_data, ACPI_HEST_NOTIFY_SEA, 28, 0,
+ 0, 0, 0, 0, 0, 0);
+ }
+
+ /* Error Status Block Length */
+ build_append_int_noprefix(table_data,
+ cpu_to_le32(GHES_MAX_RAW_DATA_LENGTH), 4);
+
+ /* Build Read ACK register
+ * ACPI 6.1/6.2: 18.3.2.8 Generic Hardware Error Source
+ * version 2 (GHESv2 - Type 10)
+ */
+ build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0);
+ bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
+ READ_ACK_REGISTER_ADDRESS_OFFSET(length, i), GHES_ADDRESS_SIZE,
+ GHES_ERRORS_FW_CFG_FILE,
+ (ACPI_HEST_ERROR_SOURCE_COUNT + i) * GHES_ADDRESS_SIZE);
+
+ /* Build Read Ack Preserve and Read Ack Writer */
+ build_append_int_noprefix(table_data, cpu_to_le64(ReadAckPreserve), 8);
+ build_append_int_noprefix(table_data, cpu_to_le64(ReadAckWrite), 8);
+ }
+
+ /* Generic Error Status Block offset in the hardware error fw_cfg blob */
+ error_status_block_offset = GHES_ADDRESS_SIZE * 2 *
+ ACPI_HEST_ERROR_SOURCE_COUNT;
+
+ for (i = 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++)
+ /* Patch address of Error Status Data Block into
+ * the error_block_address of hardware_errors fw_cfg blob
+ */
+ bios_linker_loader_add_pointer(linker,
+ GHES_ERRORS_FW_CFG_FILE, GHES_ADDRESS_SIZE * i, GHES_ADDRESS_SIZE,
+ GHES_ERRORS_FW_CFG_FILE,
+ error_status_block_offset + i * GHES_MAX_RAW_DATA_LENGTH);
+
+ /* write address of hardware_errors fw_cfg blob into the
+ * hardware_errors_addr fw_cfg blob.
+ */
+ bios_linker_loader_write_pointer(linker, GHES_DATA_ADDR_FW_CFG_FILE,
+ 0, GHES_ADDRESS_SIZE, GHES_ERRORS_FW_CFG_FILE, 0);
+
+ build_header(linker, table_data,
+ (void *)(table_data->data + length), "HEST",
+ table_data->len - length, 1, NULL, "GHES");
+}
+
+static GhesState ges;
+void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_error)
+{
+
+ size_t size = 2 * GHES_ADDRESS_SIZE + GHES_MAX_RAW_DATA_LENGTH;
+ size_t request_block_size = ACPI_HEST_ERROR_SOURCE_COUNT * size;
+
+ /* Create a read-only fw_cfg file for GHES */
+ fw_cfg_add_file(s, GHES_ERRORS_FW_CFG_FILE, hardware_error->data,
+ request_block_size);
+
+ /* Create a read-write fw_cfg file for Address */
+ fw_cfg_add_file_callback(s, GHES_DATA_ADDR_FW_CFG_FILE, NULL, NULL, NULL,
+ &ges.ghes_addr_le, sizeof(ges.ghes_addr_le), false);
+}
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 5923248..4f2478f 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1645,6 +1645,7 @@ void acpi_build_tables_init(AcpiBuildTables *tables)
tables->table_data = g_array_new(false, true /* clear */, 1);
tables->tcpalog = g_array_new(false, true /* clear */, 1);
tables->vmgenid = g_array_new(false, true /* clear */, 1);
+ tables->hardware_errors = g_array_new(false, true /* clear */, 1);
tables->linker = bios_linker_loader_init();
}
@@ -1655,6 +1656,7 @@ void acpi_build_tables_cleanup(AcpiBuildTables *tables, bool mfre)
g_array_free(tables->table_data, true);
g_array_free(tables->tcpalog, mfre);
g_array_free(tables->vmgenid, mfre);
+ g_array_free(tables->hardware_errors, mfre);
}
/* Build rsdt table */
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..19c1b7e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -45,6 +45,7 @@
#include "hw/arm/virt.h"
#include "sysemu/numa.h"
#include "kvm_arm.h"
+#include "hw/acpi/acpi_ghes.h"
#define ARM_SPI_BASE 32
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -835,6 +836,11 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
build_spcr(tables_blob, tables->linker, vms);
+ acpi_add_table(table_offsets, tables_blob);
+ build_hardware_error_table(tables->hardware_errors, tables->linker);
+ build_apei_hest(tables_blob, tables->hardware_errors, tables->linker);
+
+
if (nb_numa_nodes > 0) {
acpi_add_table(table_offsets, tables_blob);
build_srat(tables_blob, tables->linker, vms);
@@ -951,6 +957,8 @@ void virt_acpi_setup(VirtMachineState *vms)
fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
acpi_data_len(tables.tcpalog));
+ ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors);
+
build_state->rsdp_mr = acpi_add_rom_blob(build_state, tables.rsdp,
ACPI_BUILD_RSDP_FILE, 0);
diff --git a/include/hw/acpi/acpi_ghes.h b/include/hw/acpi/acpi_ghes.h
new file mode 100644
index 0000000..0a7c6c2
--- /dev/null
+++ b/include/hw/acpi/acpi_ghes.h
@@ -0,0 +1,82 @@
+/* Support for generating APEI tables and record CPER for Guests
+ *
+ * Copyright (C) 2017 HuaWei Corporation.
+ *
+ * Author: Dongjiu Geng <gengdongjiu@huawei.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ACPI_GHES_H
+#define ACPI_GHES_H
+
+#include "hw/acpi/bios-linker-loader.h"
+
+#define GHES_ERRORS_FW_CFG_FILE "etc/hardware_errors"
+#define GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr"
+
+/* The size of Address field in Generic Address Structure, ACPI 2.0/3.0: 5.2.3.1 Generic Address
+ * Structure
+ */
+#define GHES_ADDRESS_SIZE 8
+
+#define GHES_DATA_LENGTH 72
+#define GHES_CPER_LENGTH 80
+
+#define ReadAckPreserve 0xfffffffe
+#define ReadAckWrite 0x1
+
+#define GHES_CPER_OK 1
+#define GHES_CPER_FAIL 0
+
+/* The max size in bytes for one error block */
+#define GHES_MAX_RAW_DATA_LENGTH 0x1000
+/* Now only have GPIO-Signal and ARMv8 SEA notification types error sources
+ */
+#define ACPI_HEST_ERROR_SOURCE_COUNT 2
+
+/*
+ * | +--------------------------+ 0
+ * | | Header |
+ * | +--------------------------+ 40---+-
+ * | | ................. | |
+ * | | error_status_address-----+ 60 |
+ * | | ................. | |
+ * | | read_ack_register--------+ 104 92
+ * | | read_ack_preserve | |
+ * | | read_ack_write | |
+ * + +--------------------------+ 132--+-
+ *
+ * From above GHES definition, the error status address offset is 60;
+ * the Read ack register offset is 104, the whole size of GHESv2 is 92
+ */
+
+/* The error status address offset in GHES */
+#define ERROR_STATUS_ADDRESS_OFFSET(start_addr, n) (start_addr + 60 + \
+ offsetof(struct AcpiGenericAddress, address) + n * 92)
+
+/* The read Ack register offset in GHES */
+#define READ_ACK_REGISTER_ADDRESS_OFFSET(start_addr, n) (start_addr + 104 + \
+ offsetof(struct AcpiGenericAddress, address) + n * 92)
+
+typedef struct GhesState {
+ uint64_t ghes_addr_le;
+} GhesState;
+
+void build_apei_hest(GArray *table_data, GArray *hardware_error,
+ BIOSLinker *linker);
+
+void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linker);
+void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_errors);
+#endif
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 657a0d5..c01b0f3 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -220,6 +220,7 @@ struct AcpiBuildTables {
GArray *rsdp;
GArray *tcpalog;
GArray *vmgenid;
+ GArray *hardware_errors;
BIOSLinker *linker;
} AcpiBuildTables;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 06/10] docs: APEI GHES generation and CPER record description
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (4 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 05/10] ACPI: Add APEI GHES table generation and CPER record support Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder Dongjiu Geng
` (5 subsequent siblings)
11 siblings, 0 replies; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Address Igor's comments to add a doc
---
docs/specs/acpi_hest_ghes.txt | 97 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
create mode 100644 docs/specs/acpi_hest_ghes.txt
diff --git a/docs/specs/acpi_hest_ghes.txt b/docs/specs/acpi_hest_ghes.txt
new file mode 100644
index 0000000..fbfc787
--- /dev/null
+++ b/docs/specs/acpi_hest_ghes.txt
@@ -0,0 +1,97 @@
+APEI tables generating and CPER record
+=============================
+
+Copyright (C) 2017 HuaWei Corporation.
+
+Design Details:
+-------------------
+
+ etc/acpi/tables etc/hardware_errors
+ ==================== ==========================================
++ +--------------------------+ +-----------------------+
+| | HEST | | address | +--------------+
+| +--------------------------+ | registers | | Error Status |
+| | GHES1 | | +---------------------+ | Data Block 1 |
+| +--------------------------+ +--------->| |error_block_address1 |----------->| +------------+
+| | ................. | | | +---------------------+ | | CPER |
+| | error_status_address-----+-+ +------->| |error_block_address2 |--------+ | | CPER |
+| | ................. | | | +---------------------+ | | | .... |
+| | read_ack_register--------+-+ | | | .............. | | | | CPER |
+| | read_ack_preserve | | | +-----------------------+ | | +------------+
+| | read_ack_write | | | +----->| |error_block_addressN |------+ | | Error Status |
++ +--------------------------+ | | | | +---------------------+ | | | Data Block 2 |
+| | GHES2 | +-+-+----->| |read_ack_register1 | | +-->| +------------+
++ +--------------------------+ | | | +---------------------+ | | | CPER |
+| | ................. | | | +--->| |read_ack_register2 | | | | CPER |
+| | error_status_address-----+---+ | | | +---------------------+ | | | .... |
+| | ................. | | | | | ............. | | | | CPER |
+| | read_ack_register--------+-----+-+ | +---------------------+ | +-+------------+
+| | read_ack_preserve | | +->| |read_ack_registerN | | | |.......... |
+| | read_ack_write | | | | +---------------------+ | | +------------+
++ +--------------------------| | | | | Error Status |
+| | ............... | | | | | Data Block N |
++ +--------------------------+ | | +---->| +------------+
+| | GHESN | | | | | CPER |
++ +--------------------------+ | | | | CPER |
+| | ................. | | | | | .... |
+| | error_status_address-----+-----+ | | | CPER |
+| | ................. | | +-+------------+
+| | read_ack_register--------+---------+
+| | read_ack_preserve |
+| | read_ack_write |
++ +--------------------------+
+
+(1) QEMU generates the ACPI HEST table. This table goes in the current
+ "etc/acpi/tables" fw_cfg blob. Each error source has different
+ notification type.
+
+(2) A new fw_cfg blob called "etc/hardware_errors" is introduced. QEMU
+ also need to populate this blob. The "etc/hardwre_errors" fw_cfg blob
+ contains one address registers table and one Error Status Data Block
+ table, all of which are pre-allocated.
+
+(3) The address registers table contains N Error Block Address entries
+ and N Read Ack Address entries, the size for each entry is 8-byte.
+ The Error Status Data Block table contains N Error Status Data Block
+ entries, the size for each entry is 4096(0x1000) bytes. The total size
+ for "etc/hardware_errors" fw_cfg blob is (N * 8 * 2 + N * 4096) bytes.
+
+(4) QEMU generates the ACPI linker/loader script for the firmware
+
+(4a) The HEST table is part of "etc/acpi/tables", the firmware already
+ allocates the memory for it, because QEMU already generates an ALLOCATE
+ linker/loader command for it
+
+(4b) QEMU creates another ALLOCATE command for the "etc/hardware_errors"
+ blob. The firmware allocates memory for this blob and downloads it.
+
+(5) QEMU generates N ADD_POINTER commands, which patch address in the
+ "error_status_address" fields of the HEST table with a pointer to the
+ corresponding "address registers" in the downloaded "etc/hardware_errors"
+ blob.
+
+(6) QEMU generates N ADD_POINTER commands, which patch address in the
+ "read_ack_register" fields of the HEST table with a pointer to the
+ corresponding "address registers" in the downloaded "etc/hardware_errors" blob.
+
+(7) QEMU generates N ADD_POINTER commands for the firmware, which patch
+ address in the " error_block_address" fields with a pointer to the
+ respective "Error Status Data Block" in the downloaded "etc/hardware_errors"
+ blob.
+
+(8) QEMU Defines a third and write-only fw_cfg blob which is called
+ "etc/hardware_errors_addr". Through that blob, the firmware can send back
+ the guest-side allocation addresses to QEMU. The "etc/hardware_errors_addr"
+ blob contains a 8-byte entry. QEMU generates a single WRITE_POINTER commands
+ for the firmware, the firmware will write back the start address of
+ "etc/hardware_errors" blob to fw_cfg file "etc/hardware_errors_addr". Then
+ Qemu will know the Error Status Data Block for every error source. Each of
+ Error Status Data Block has fixed size which is 4096(0x1000).
+
+(9) When QEMU gets SIGBUS from the kernel, QEMU formats the CPER right into
+ guest memory, and then injects whatever interrupt (or assert whatever GPIO line)
+ as a notification which is necessary for notifying the guest.
+
+(10) This notification (in virtual hardware) will be handled by guest kernel,
+ guest APEI driver will read the CPER which is recorded by QEMU and do the
+ recovery.
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (5 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 06/10] docs: APEI GHES generation and CPER record description Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-20 14:57 ` Peter Maydell
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 08/10] target-arm: kvm64: inject synchronous External Abort Dongjiu Geng
` (4 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
kvm_hwpoison_page_add() and kvm_unpoison_all() will be used both
by X86 and ARM platforms, so move these functions to a common
accel/kvm/ folder to avoid duplicate code.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Address Peter's comments to move related hwpoison page function to
accel/kvm folder in [1]
Address Paolo's comments to move HWPoisonPage definition back to
accel/kvm/kvm-all.c
[1]:
https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00077.html
https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00152.html
---
accel/kvm/kvm-all.c | 33 +++++++++++++++++++++++++++++++++
include/exec/ram_addr.h | 5 +++++
target/i386/kvm.c | 33 ---------------------------------
3 files changed, 38 insertions(+), 33 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 4880a05..003deac 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -625,6 +625,39 @@ int kvm_vm_check_extension(KVMState *s, unsigned int extension)
return ret;
}
+typedef struct HWPoisonPage {
+ ram_addr_t ram_addr;
+ QLIST_ENTRY(HWPoisonPage) list;
+} HWPoisonPage;
+
+static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
+ QLIST_HEAD_INITIALIZER(hwpoison_page_list);
+
+void kvm_unpoison_all(void *param)
+{
+ HWPoisonPage *page, *next_page;
+
+ QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) {
+ QLIST_REMOVE(page, list);
+ qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
+ g_free(page);
+ }
+}
+
+void kvm_hwpoison_page_add(ram_addr_t ram_addr)
+{
+ HWPoisonPage *page;
+
+ QLIST_FOREACH(page, &hwpoison_page_list, list) {
+ if (page->ram_addr == ram_addr) {
+ return;
+ }
+ }
+ page = g_new(HWPoisonPage, 1);
+ page->ram_addr = ram_addr;
+ QLIST_INSERT_HEAD(&hwpoison_page_list, page, list);
+}
+
static uint32_t adjust_ioeventfd_endianness(uint32_t val, uint32_t size)
{
#if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 9ecd911..1e02fb9 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -115,6 +115,11 @@ void qemu_ram_free(RAMBlock *block);
int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp);
+/* Add a poisoned page to the list */
+void kvm_hwpoison_page_add(ram_addr_t ram_addr);
+/* Free and remove all the poisoned pages in the list */
+void kvm_unpoison_all(void *param);
+
#define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1)
#define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE))
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 796a049..08b3feb 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -457,39 +457,6 @@ uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index)
}
-typedef struct HWPoisonPage {
- ram_addr_t ram_addr;
- QLIST_ENTRY(HWPoisonPage) list;
-} HWPoisonPage;
-
-static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
- QLIST_HEAD_INITIALIZER(hwpoison_page_list);
-
-static void kvm_unpoison_all(void *param)
-{
- HWPoisonPage *page, *next_page;
-
- QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) {
- QLIST_REMOVE(page, list);
- qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
- g_free(page);
- }
-}
-
-static void kvm_hwpoison_page_add(ram_addr_t ram_addr)
-{
- HWPoisonPage *page;
-
- QLIST_FOREACH(page, &hwpoison_page_list, list) {
- if (page->ram_addr == ram_addr) {
- return;
- }
- }
- page = g_new(HWPoisonPage, 1);
- page->ram_addr = ram_addr;
- QLIST_INSERT_HEAD(&hwpoison_page_list, page, list);
-}
-
static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
int *max_banks)
{
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder Dongjiu Geng
@ 2018-11-20 14:57 ` Peter Maydell
2018-11-21 12:01 ` [Qemu-devel] 答复: " gengdongjiu
0 siblings, 1 reply; 22+ messages in thread
From: Peter Maydell @ 2018-11-20 14:57 UTC (permalink / raw)
To: Dongjiu Geng
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
Zheng Xiang, Eduardo Habkost, kvm-devel, Shannon Zhao,
QEMU Developers, qemu-arm
On 8 November 2018 at 10:29, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
> kvm_hwpoison_page_add() and kvm_unpoison_all() will be used both
> by X86 and ARM platforms, so move these functions to a common
> accel/kvm/ folder to avoid duplicate code.
>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> ---
> Address Peter's comments to move related hwpoison page function to
> accel/kvm folder in [1]
> Address Paolo's comments to move HWPoisonPage definition back to
> accel/kvm/kvm-all.c
>
> [1]:
> https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00077.html
> https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00152.html
> ---
> --- a/include/exec/ram_addr.h
> +++ b/include/exec/ram_addr.h
> @@ -115,6 +115,11 @@ void qemu_ram_free(RAMBlock *block);
>
> int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp);
>
> +/* Add a poisoned page to the list */
> +void kvm_hwpoison_page_add(ram_addr_t ram_addr);
> +/* Free and remove all the poisoned pages in the list */
> +void kvm_unpoison_all(void *param);
> +
In my previous review comments I said:
>>> Any new globally-visible function prototype in a header should
>>> have a doc-comment formatted documentation comment, please.
>>
>>
>> Ok, thanks for this reminder. Do you mean I need to add comments
>> for this globally-visible function, such as below:
>>
>> /*
>> * xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
>> */
>> void kvm_hwpoison_page_add(ram_addr_t ram_addr);
>
> It should be in the doc-comment format, which begins
> "/**" and has some stylization of how you list parameters
> and so on. Lots of examples in the existing headers.
Can we have a doc-comment in the proper format and with a little
more detail than a single line, please?
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] 答复: [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder
2018-11-20 14:57 ` Peter Maydell
@ 2018-11-21 12:01 ` gengdongjiu
0 siblings, 0 replies; 22+ messages in thread
From: gengdongjiu @ 2018-11-21 12:01 UTC (permalink / raw)
To: Peter Maydell
Cc: Eduardo Habkost, kvm-devel, Michael S. Tsirkin, Marc Zyngier,
Marcelo Tosatti, QEMU Developers, Shannon Zhao, zhengxiang (A),
qemu-arm, James Morse, Paolo Bonzini, Igor Mammedov,
Laszlo Ersek, Richard Henderson
Hi Peter,
Thanks very much for the commands and review.
> On 8 November 2018 at 10:29, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
> > kvm_hwpoison_page_add() and kvm_unpoison_all() will be used both by
> > X86 and ARM platforms, so move these functions to a common accel/kvm/
> > folder to avoid duplicate code.
> >
> > Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> > ---
> > Address Peter's comments to move related hwpoison page function to
> > accel/kvm folder in [1] Address Paolo's comments to move HWPoisonPage
> > definition back to accel/kvm/kvm-all.c
> >
> > [1]:
> > https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00077.html
> > https://lists.gnu.org/archive/html/qemu-arm/2017-09/msg00152.html
> > ---
>
> > --- a/include/exec/ram_addr.h
> > +++ b/include/exec/ram_addr.h
> > @@ -115,6 +115,11 @@ void qemu_ram_free(RAMBlock *block);
> >
> > int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error
> > **errp);
> >
> > +/* Add a poisoned page to the list */ void
> > +kvm_hwpoison_page_add(ram_addr_t ram_addr);
> > +/* Free and remove all the poisoned pages in the list */ void
> > +kvm_unpoison_all(void *param);
> > +
>
> In my previous review comments I said:
> >>> Any new globally-visible function prototype in a header should have
> >>> a doc-comment formatted documentation comment, please.
> >>
> >>
> >> Ok, thanks for this reminder. Do you mean I need to add comments for
> >> this globally-visible function, such as below:
> >>
> >> /*
> >> * xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> >> */
> >> void kvm_hwpoison_page_add(ram_addr_t ram_addr);
> >
> > It should be in the doc-comment format, which begins "/**" and has
> > some stylization of how you list parameters and so on. Lots of
> > examples in the existing headers.
>
> Can we have a doc-comment in the proper format and with a little more detail than a single line, please?
Sure, I will add it in the proper format, thanks, May be I forget it.
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 08/10] target-arm: kvm64: inject synchronous External Abort
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (6 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 07/10] KVM: Move related hwpoison page functions to accel/kvm/ folder Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-20 15:07 ` Peter Maydell
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 09/10] hw/arm/virt: Add RAS platform version for migration Dongjiu Geng
` (3 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
Add synchronous external abort injection logic, setup
exception type and syndrome value. When switch to guest,
guest will jump to the synchronous external abort vector
table entry.
The ESR_ELx.DFSC is set to synchronous external abort(0x10),
and ESR_ELx.FnV is set to not valid(0x1), which will tell
guest that FAR is not valid and holds an UNKNOWN value.
These value will be set to KVM register structures through
KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Marc is against that KVM inject the synchronous external abort(SEA) in [1],
so user space how to inject it. The test result that injection SEA to guest by Qemu
is shown in [2].
[1]: https://lkml.org/lkml/2017/3/2/110
[2]:
Taking exception 4 [Data Abort]
...from EL0 to EL1
...with ESR 0x24/0x92000410
...with FAR 0x0
...with ELR 0x40cf04
...to EL1 PC 0xffffffc000084c00 PSTATE 0x3c5
after kvm_inject_arm_sea
Unhandled fault: synchronous external abort (0x92000410) at 0x0000007fa234c12c
CPU: 0 PID: 536 Comm: devmem Not tainted 4.1.0+ #20
Hardware name: linux,dummy-virt (DT)
task: ffffffc019ab2b00 ti: ffffffc008134000 task.ti: ffffffc008134000
PC is at 0x40cf04
LR is at 0x40cdec
pc : [<000000000040cf04>] lr : [<000000000040cdec>] pstate: 60000000
sp : 0000007ff7b24130
x29: 0000007ff7b24260 x28: 0000000000000000
x27: 00000000000000ad x26: 000000000049c000
x25: 000000000048904b x24: 000000000049c000
x23: 0000000040600000 x22: 0000007ff7b243a0
x21: 0000000000000002 x20: 0000000000000000
x19: 0000000000000020 x18: 0000000000000000
x17: 000000000049c6d0 x16: 0000007fa22c85c0
x15: 0000000000005798 x14: 0000007fa2205f1c
x13: 0000007fa241ccb0 x12: 0000000000000137
x11: 0000000000000000 x10: 0000000000000000
x9 : 0000000000000000 x8 : 00000000000000de
x7 : 0000000000000000 x6 : 0000000000002000
x5 : 0000000040600000 x4 : 0000000000000003
x3 : 0000000000000001 x2 : 0000000000000000
x1 : 0000000000000000 x0 : 0000007fa2418000
---
target/arm/cpu.h | 2 ++
target/arm/helper.c | 23 +++++++++++++++++++++++
target/arm/internals.h | 5 +++--
target/arm/kvm64.c | 39 +++++++++++++++++++++++++++++++++++++++
target/arm/op_helper.c | 2 +-
5 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index b5eff79..502507d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2331,6 +2331,8 @@ bool write_list_to_cpustate(ARMCPU *cpu);
*/
bool write_cpustate_to_list(ARMCPU *cpu);
+bool write_part_cpustate_to_list(ARMCPU *cpu, ptrdiff_t fieldoffset);
+
#define ARM_CPUID_TI915T 0x54029152
#define ARM_CPUID_TI925T 0x54029252
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 9630193..df078ff 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -263,6 +263,29 @@ static bool raw_accessors_invalid(const ARMCPRegInfo *ri)
return true;
}
+bool write_part_cpustate_to_list(ARMCPU *cpu, ptrdiff_t fieldoffset)
+{
+ const ARMCPRegInfo *ri;
+ uint32_t regidx, i;
+
+ for (i = 0; i < cpu->cpreg_array_len; i++) {
+ regidx = kvm_to_cpreg_id(cpu->cpreg_indexes[i]);
+ ri = get_arm_cp_reginfo(cpu->cp_regs, regidx);
+ if (!ri) {
+ continue;
+ }
+
+ if (ri->type & ARM_CP_NO_RAW) {
+ continue;
+ }
+ if (ri->fieldoffset == fieldoffset) {
+ cpu->cpreg_values[i] = read_raw_cp_reg(&cpu->env, ri);
+ return true;
+ }
+ }
+ return false;
+}
+
bool write_cpustate_to_list(ARMCPU *cpu)
{
/* Write the coprocessor state from cpu->env to the (index,value) list. */
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 6c2bb2d..04ea074 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -415,13 +415,14 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)
| ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc;
}
-static inline uint32_t syn_data_abort_no_iss(int same_el,
+static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv,
int ea, int cm, int s1ptw,
int wnr, int fsc)
{
return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
| ARM_EL_IL
- | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
+ | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7)
+ | (wnr << 6) | fsc;
}
static inline uint32_t syn_data_abort_with_iss(int same_el,
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 5de8ff0..0ca2b29 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -594,6 +594,45 @@ int kvm_arm_cpreg_level(uint64_t regidx)
return KVM_PUT_RUNTIME_STATE;
}
+/* Inject synchronous external abort */
+static void kvm_inject_arm_sea(CPUState *c)
+{
+ ARMCPU *cpu = ARM_CPU(c);
+ CPUARMState *env = &cpu->env;
+ CPUClass *cc = CPU_GET_CLASS(c);
+ uint32_t esr;
+ int ret;
+
+ /* This exception is synchronous data abort */
+ c->exception_index = EXCP_DATA_ABORT;
+ /* Inject the exception to guest EL1 */
+ env->exception.target_el = 1;
+
+ /* Set the DFSC to synchronous external abort and set FnV to not valid,
+ * this will tell guest the FAR_ELx is UNKNOWN for this abort.
+ */
+
+ /* This exception comes from lower or current exception level. */
+ if (arm_current_el(env) == PSTATE_MODE_EL0t) {
+ esr = syn_data_abort_no_iss(0, 1, 0, 0, 0, 0, 0x10);
+ } else {
+ esr = syn_data_abort_no_iss(1, 1, 0, 0, 0, 0, 0x10);
+ }
+
+ env->exception.syndrome = esr;
+
+ cc->do_interrupt(c);
+ if (kvm_enabled()) {
+ /* write ESR_EL1 from cpustate to list*/
+ ret = write_part_cpustate_to_list(cpu,
+ offsetof(CPUARMState, cp15.esr_el[1]));
+ if (!ret) {
+ fprintf(stderr, "<%s> failed to set esr_el1\n", __func__);
+ abort();
+ }
+ }
+}
+
#define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 90741f6..3f1d656 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -109,7 +109,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
* ISV field.
*/
if (!(template_syn & ARM_EL_ISV) || target_el != 2 || s1ptw) {
- syn = syn_data_abort_no_iss(same_el,
+ syn = syn_data_abort_no_iss(same_el, 0,
ea, 0, s1ptw, is_write, fsc);
} else {
/* Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 08/10] target-arm: kvm64: inject synchronous External Abort
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 08/10] target-arm: kvm64: inject synchronous External Abort Dongjiu Geng
@ 2018-11-20 15:07 ` Peter Maydell
0 siblings, 0 replies; 22+ messages in thread
From: Peter Maydell @ 2018-11-20 15:07 UTC (permalink / raw)
To: Dongjiu Geng
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
Zheng Xiang, Eduardo Habkost, kvm-devel, Shannon Zhao,
QEMU Developers, qemu-arm
On 8 November 2018 at 10:29, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
> Add synchronous external abort injection logic, setup
> exception type and syndrome value. When switch to guest,
> guest will jump to the synchronous external abort vector
> table entry.
>
> The ESR_ELx.DFSC is set to synchronous external abort(0x10),
> and ESR_ELx.FnV is set to not valid(0x1), which will tell
> guest that FAR is not valid and holds an UNKNOWN value.
> These value will be set to KVM register structures through
> KVM_SET_ONE_REG IOCTL.
>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> ---
> Marc is against that KVM inject the synchronous external abort(SEA) in [1],
> so user space how to inject it. The test result that injection SEA to guest by Qemu
> is shown in [2].
>
> [1]: https://lkml.org/lkml/2017/3/2/110
> [2]:
> Taking exception 4 [Data Abort]
> ...from EL0 to EL1
> ...with ESR 0x24/0x92000410
> ...with FAR 0x0
> ...with ELR 0x40cf04
> ...to EL1 PC 0xffffffc000084c00 PSTATE 0x3c5
> after kvm_inject_arm_sea
> Unhandled fault: synchronous external abort (0x92000410) at 0x0000007fa234c12c
> CPU: 0 PID: 536 Comm: devmem Not tainted 4.1.0+ #20
> Hardware name: linux,dummy-virt (DT)
> task: ffffffc019ab2b00 ti: ffffffc008134000 task.ti: ffffffc008134000
> PC is at 0x40cf04
> LR is at 0x40cdec
> pc : [<000000000040cf04>] lr : [<000000000040cdec>] pstate: 60000000
> sp : 0000007ff7b24130
> x29: 0000007ff7b24260 x28: 0000000000000000
> x27: 00000000000000ad x26: 000000000049c000
> x25: 000000000048904b x24: 000000000049c000
> x23: 0000000040600000 x22: 0000007ff7b243a0
> x21: 0000000000000002 x20: 0000000000000000
> x19: 0000000000000020 x18: 0000000000000000
> x17: 000000000049c6d0 x16: 0000007fa22c85c0
> x15: 0000000000005798 x14: 0000007fa2205f1c
> x13: 0000007fa241ccb0 x12: 0000000000000137
> x11: 0000000000000000 x10: 0000000000000000
> x9 : 0000000000000000 x8 : 00000000000000de
> x7 : 0000000000000000 x6 : 0000000000002000
> x5 : 0000000040600000 x4 : 0000000000000003
> x3 : 0000000000000001 x2 : 0000000000000000
> x1 : 0000000000000000 x0 : 0000007fa2418000
> ---
> target/arm/cpu.h | 2 ++
> target/arm/helper.c | 23 +++++++++++++++++++++++
> target/arm/internals.h | 5 +++--
> target/arm/kvm64.c | 39 +++++++++++++++++++++++++++++++++++++++
> target/arm/op_helper.c | 2 +-
> 5 files changed, 68 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index b5eff79..502507d 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -2331,6 +2331,8 @@ bool write_list_to_cpustate(ARMCPU *cpu);
> */
> bool write_cpustate_to_list(ARMCPU *cpu);
>
> +bool write_part_cpustate_to_list(ARMCPU *cpu, ptrdiff_t fieldoffset);
> +
> #define ARM_CPUID_TI915T 0x54029152
> #define ARM_CPUID_TI925T 0x54029252
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 9630193..df078ff 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -263,6 +263,29 @@ static bool raw_accessors_invalid(const ARMCPRegInfo *ri)
> return true;
> }
>
> +bool write_part_cpustate_to_list(ARMCPU *cpu, ptrdiff_t fieldoffset)
> +{
> + const ARMCPRegInfo *ri;
> + uint32_t regidx, i;
> +
> + for (i = 0; i < cpu->cpreg_array_len; i++) {
> + regidx = kvm_to_cpreg_id(cpu->cpreg_indexes[i]);
> + ri = get_arm_cp_reginfo(cpu->cp_regs, regidx);
> + if (!ri) {
> + continue;
> + }
> +
> + if (ri->type & ARM_CP_NO_RAW) {
> + continue;
> + }
> + if (ri->fieldoffset == fieldoffset) {
> + cpu->cpreg_values[i] = read_raw_cp_reg(&cpu->env, ri);
> + return true;
> + }
> + }
> + return false;
> +}
What is this about? Nothing else in QEMU needs to mess with the
cpustate synchronization. My first assumption is that you should
not need to do so either.
> +
> bool write_cpustate_to_list(ARMCPU *cpu)
> {
> /* Write the coprocessor state from cpu->env to the (index,value) list. */
> diff --git a/target/arm/internals.h b/target/arm/internals.h
> index 6c2bb2d..04ea074 100644
> --- a/target/arm/internals.h
> +++ b/target/arm/internals.h
> @@ -415,13 +415,14 @@ static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)
> | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc;
> }
>
> -static inline uint32_t syn_data_abort_no_iss(int same_el,
> +static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv,
> int ea, int cm, int s1ptw,
> int wnr, int fsc)
> {
> return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
> | ARM_EL_IL
> - | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
> + | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7)
> + | (wnr << 6) | fsc;
> }
>
> static inline uint32_t syn_data_abort_with_iss(int same_el,
> diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> index 5de8ff0..0ca2b29 100644
> --- a/target/arm/kvm64.c
> +++ b/target/arm/kvm64.c
> @@ -594,6 +594,45 @@ int kvm_arm_cpreg_level(uint64_t regidx)
> return KVM_PUT_RUNTIME_STATE;
> }
>
> +/* Inject synchronous external abort */
> +static void kvm_inject_arm_sea(CPUState *c)
> +{
> + ARMCPU *cpu = ARM_CPU(c);
> + CPUARMState *env = &cpu->env;
> + CPUClass *cc = CPU_GET_CLASS(c);
> + uint32_t esr;
> + int ret;
> +
> + /* This exception is synchronous data abort */
> + c->exception_index = EXCP_DATA_ABORT;
> + /* Inject the exception to guest EL1 */
> + env->exception.target_el = 1;
These comments don't tell us anything that the code does not.
> +
> + /* Set the DFSC to synchronous external abort and set FnV to not valid,
> + * this will tell guest the FAR_ELx is UNKNOWN for this abort.
> + */
> +
> + /* This exception comes from lower or current exception level. */
> + if (arm_current_el(env) == PSTATE_MODE_EL0t) {
arm_current_el() returns an integer; you should be comparing it to
0,1,2,3, not to PSTATE_MODE_* constants.
> + esr = syn_data_abort_no_iss(0, 1, 0, 0, 0, 0, 0x10);
> + } else {
> + esr = syn_data_abort_no_iss(1, 1, 0, 0, 0, 0, 0x10);
> + }
Better written as
bool same_el;
[...]
same_el = arm_current_el(env) == env->exception.target_el;
env->exception.syndrome = syn_data_abort_no_iss(same_el, 1, 0, 0,
0, 0, 0x10);
> +
> + env->exception.syndrome = esr;
> +
> + cc->do_interrupt(c);
You need to take the iothread lock before calling do_interrupt.
Compare the code in kvm_arm_handle_debug().
> + if (kvm_enabled()) {
How can we get here if KVM is not enabled ?
> + /* write ESR_EL1 from cpustate to list*/
> + ret = write_part_cpustate_to_list(cpu,
> + offsetof(CPUARMState, cp15.esr_el[1]));
> + if (!ret) {
> + fprintf(stderr, "<%s> failed to set esr_el1\n", __func__);
> + abort();
> + }
kvm_arm_handle_debug() doesn't need to do this, I don't understand
why this would be different.
> + }
> +}
> +
> #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
> KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
>
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 90741f6..3f1d656 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -109,7 +109,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
> * ISV field.
> */
> if (!(template_syn & ARM_EL_ISV) || target_el != 2 || s1ptw) {
> - syn = syn_data_abort_no_iss(same_el,
> + syn = syn_data_abort_no_iss(same_el, 0,
> ea, 0, s1ptw, is_write, fsc);
> } else {
> /* Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template
> --
> 1.8.3.1
>
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 09/10] hw/arm/virt: Add RAS platform version for migration
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (7 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 08/10] target-arm: kvm64: inject synchronous External Abort Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-20 15:00 ` Peter Maydell
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Dongjiu Geng
` (2 subsequent siblings)
11 siblings, 1 reply; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
Support this feature since version 2.12, disable it by
default in the old version.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Address Shannon's comments to add platform version in [1].
[1]: https://lkml.org/lkml/2017/8/25/821
---
hw/arm/virt-acpi-build.c | 14 +++++++++-----
hw/arm/virt.c | 4 ++++
include/hw/arm/virt.h | 1 +
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 19c1b7e..6f50a29 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -836,10 +836,11 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
build_spcr(tables_blob, tables->linker, vms);
- acpi_add_table(table_offsets, tables_blob);
- build_hardware_error_table(tables->hardware_errors, tables->linker);
- build_apei_hest(tables_blob, tables->hardware_errors, tables->linker);
-
+ if (!vmc->no_ras) {
+ acpi_add_table(table_offsets, tables_blob);
+ build_hardware_error_table(tables->hardware_errors, tables->linker);
+ build_apei_hest(tables_blob, tables->hardware_errors, tables->linker);
+ }
if (nb_numa_nodes > 0) {
acpi_add_table(table_offsets, tables_blob);
@@ -926,6 +927,7 @@ static const VMStateDescription vmstate_virt_acpi_build = {
void virt_acpi_setup(VirtMachineState *vms)
{
+ VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
AcpiBuildTables tables;
AcpiBuildState *build_state;
@@ -957,7 +959,9 @@ void virt_acpi_setup(VirtMachineState *vms)
fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
acpi_data_len(tables.tcpalog));
- ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors);
+ if (!vmc->no_ras) {
+ ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors);
+ }
build_state->rsdp_mr = acpi_add_rom_blob(build_state, tables.rsdp,
ACPI_BUILD_RSDP_FILE, 0);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..367306b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1920,6 +1920,10 @@ static void virt_machine_2_11_options(MachineClass *mc)
virt_machine_2_12_options(mc);
SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);
vmc->smbios_old_sys_ver = true;
+ /* Disable memory recovery feature for 2.11 as RAS support was
+ * introduced with 2.12.
+ */
+ vmc->no_ras = true;
}
DEFINE_VIRT_MACHINE(2, 11)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..a4490dd 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -98,6 +98,7 @@ typedef struct {
bool disallow_affinity_adjustment;
bool no_its;
bool no_pmu;
+ bool no_ras;
bool claim_edge_triggered_timers;
bool smbios_old_sys_ver;
bool no_highmem_ecam;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 09/10] hw/arm/virt: Add RAS platform version for migration
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 09/10] hw/arm/virt: Add RAS platform version for migration Dongjiu Geng
@ 2018-11-20 15:00 ` Peter Maydell
0 siblings, 0 replies; 22+ messages in thread
From: Peter Maydell @ 2018-11-20 15:00 UTC (permalink / raw)
To: Dongjiu Geng
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
Zheng Xiang, Eduardo Habkost, kvm-devel, Shannon Zhao,
QEMU Developers, qemu-arm
On 8 November 2018 at 10:29, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
> Support this feature since version 2.12, disable it by
> default in the old version.
>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> ---
> Address Shannon's comments to add platform version in [1].
>
> [1]: https://lkml.org/lkml/2017/8/25/821
> ---
> hw/arm/virt-acpi-build.c | 14 +++++++++-----
> hw/arm/virt.c | 4 ++++
> include/hw/arm/virt.h | 1 +
> 3 files changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 19c1b7e..6f50a29 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -836,10 +836,11 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> build_spcr(tables_blob, tables->linker, vms);
>
> - acpi_add_table(table_offsets, tables_blob);
> - build_hardware_error_table(tables->hardware_errors, tables->linker);
> - build_apei_hest(tables_blob, tables->hardware_errors, tables->linker);
> -
> + if (!vmc->no_ras) {
> + acpi_add_table(table_offsets, tables_blob);
> + build_hardware_error_table(tables->hardware_errors, tables->linker);
> + build_apei_hest(tables_blob, tables->hardware_errors, tables->linker);
> + }
This looks odd. If we need to gate the addition of the table
on whether the machine type asks for it, then we need the
patch which adds the no_ras flag to come first. Otherwise
there's a point in the commit history where we add the tables
even for the older machine types.
> if (nb_numa_nodes > 0) {
> acpi_add_table(table_offsets, tables_blob);
> @@ -926,6 +927,7 @@ static const VMStateDescription vmstate_virt_acpi_build = {
>
> void virt_acpi_setup(VirtMachineState *vms)
> {
> + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> AcpiBuildTables tables;
> AcpiBuildState *build_state;
>
> @@ -957,7 +959,9 @@ void virt_acpi_setup(VirtMachineState *vms)
> fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
> acpi_data_len(tables.tcpalog));
>
> - ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors);
> + if (!vmc->no_ras) {
> + ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors);
> + }
>
> build_state->rsdp_mr = acpi_add_rom_blob(build_state, tables.rsdp,
> ACPI_BUILD_RSDP_FILE, 0);
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index a2b8d8f..367306b 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -1920,6 +1920,10 @@ static void virt_machine_2_11_options(MachineClass *mc)
> virt_machine_2_12_options(mc);
> SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);
> vmc->smbios_old_sys_ver = true;
> + /* Disable memory recovery feature for 2.11 as RAS support was
> + * introduced with 2.12.
> + */
> + vmc->no_ras = true;
RAS support wasn't introduced with QEMU 2.12, or even with 3.0 or
3.1. The earliest this will be added will be 4.0, so we need to
update this code accordingly.
> }
> DEFINE_VIRT_MACHINE(2, 11)
>
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 4cc57a7..a4490dd 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -98,6 +98,7 @@ typedef struct {
> bool disallow_affinity_adjustment;
> bool no_its;
> bool no_pmu;
> + bool no_ras;
> bool claim_edge_triggered_timers;
> bool smbios_old_sys_ver;
> bool no_highmem_ecam;
> --
> 1.8.3.1
>
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (8 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 09/10] hw/arm/virt: Add RAS platform version for migration Dongjiu Geng
@ 2018-11-08 10:29 ` Dongjiu Geng
2018-11-20 15:15 ` Peter Maydell
2018-11-08 22:42 ` [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU no-reply
2018-11-08 22:52 ` no-reply
11 siblings, 1 reply; 22+ messages in thread
From: Dongjiu Geng @ 2018-11-08 10:29 UTC (permalink / raw)
To: imammedo, mst, peter.maydell, lersek, marc.zyngier, james.morse,
pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm, gengdongjiu
Add SIGBUS signal handler. In this handler, it checks the SIGBUS type,
translates the host VA delivered by host to guest PA, then fill this PA
to guest APEI GHES memory, then notify guest according to the SIGBUS type.
There are two kinds of SIGBUS that QEMU needs to handle, which are
BUS_MCEERR_AO and BUS_MCEERR_AR.
If guest accesses the poisoned memory, it generates Synchronous External
Abort(SEA). Then host kernel gets an APEI notification and call memory_failure()
to unmapped the affected page from the guest's stage 2, finally return
to guest.
Guest continues to access PG_hwpoison page, it will trap to KVM as stage2 fault,
then a SIGBUS_MCEERR_AR synchronous signal is delivered to Qemu, Qemu record this
error into guest APEI GHES memory and notify guest using Synchronous-External-Abort(SEA).
Suggested-by: James Morse <james.morse@arm.com>
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
---
Address James's comments to record CPER and notify guest for SIGBUS signal handling.
Shown some discussion in [1].
[1]:
https://lkml.org/lkml/2017/2/27/246
https://lkml.org/lkml/2017/9/14/241
https://lkml.org/lkml/2017/9/22/499
---
hw/acpi/acpi_ghes.c | 164 ++++++++++++++++++++++++++++++++++++++++++++
include/hw/acpi/acpi_ghes.h | 4 ++
include/sysemu/kvm.h | 2 +-
target/arm/kvm.c | 3 +
target/arm/kvm64.c | 34 +++++++++
5 files changed, 206 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/acpi_ghes.c b/hw/acpi/acpi_ghes.c
index d03e797..ef83c05 100644
--- a/hw/acpi/acpi_ghes.c
+++ b/hw/acpi/acpi_ghes.c
@@ -26,6 +26,87 @@
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
+/* UEFI 2.6: N.2.5 Memory Error Section */
+static void build_append_mem_cper(GArray *table, uint64_t error_physical_addr)
+{
+ /*
+ * Memory Error Record
+ */
+ build_append_int_noprefix(table,
+ (1UL << 14) | /* Type Valid */
+ (1UL << 1) /* Physical Address Valid */,
+ 8);
+ /* Memory error status information */
+ build_append_int_noprefix(table, 0, 8);
+ /* The physical address at which the memory error occurred */
+ build_append_int_noprefix(table, error_physical_addr, 8);
+ build_append_int_noprefix(table, 0, 48);
+ build_append_int_noprefix(table, 0 /* Unknown error */, 1);
+ build_append_int_noprefix(table, 0, 7);
+}
+
+static int ghes_record_mem_error(uint64_t error_block_address,
+ uint64_t error_physical_addr)
+{
+ GArray *block;
+ uint64_t current_block_length;
+ uint32_t data_length;
+ /* Memory section */
+ char mem_section_id_le[] = {0x14, 0x11, 0xBC, 0xA5, 0x64, 0x6F, 0xDE,
+ 0x4E, 0xB8, 0x63, 0x3E, 0x83, 0xED, 0x7C,
+ 0x83, 0xB1};
+ uint8_t fru_id[16] = {0};
+ uint8_t fru_text[20] = {0};
+
+ block = g_array_new(false, true /* clear */, 1);
+
+ /* Read the current length in bytes of the generic error data */
+ cpu_physical_memory_read(error_block_address +
+ offsetof(AcpiGenericErrorStatus, data_length), &data_length, 4);
+
+ /* The current whole length in bytes of the generic error status block */
+ current_block_length = sizeof(AcpiGenericErrorStatus) + le32_to_cpu(data_length);
+
+ /* Add a new generic error data entry*/
+ data_length += GHES_DATA_LENGTH;
+ data_length += GHES_CPER_LENGTH;
+
+ /* Check whether it will run out of the preallocated memory if adding a new
+ * generic error data entry
+ */
+ if ((data_length + sizeof(AcpiGenericErrorStatus)) > GHES_MAX_RAW_DATA_LENGTH) {
+ error_report("Record CPER out of boundary!!!");
+ return GHES_CPER_FAIL;
+ }
+ /* Build the new generic error status block header */
+ build_append_ghes_generic_status(block, cpu_to_le32(ACPI_GEBS_UNCORRECTABLE), 0, 0,
+ cpu_to_le32(data_length), cpu_to_le32(ACPI_CPER_SEV_RECOVERABLE));
+
+ /* Write back above generic error status block header to guest memory */
+ cpu_physical_memory_write(error_block_address, block->data,
+ block->len);
+
+ /* Build the generic error data entries */
+
+ data_length = block->len;
+ /* Build the new generic error data entry header */
+ build_append_ghes_generic_data(block, mem_section_id_le,
+ cpu_to_le32(ACPI_CPER_SEV_RECOVERABLE), cpu_to_le32(0x300), 0, 0,
+ cpu_to_le32(80)/* the total size of Memory Error Record */, fru_id,
+ fru_text, 0);
+
+ /* Build the memory section CPER */
+ build_append_mem_cper(block, error_physical_addr);
+
+ /* Write back above whole new generic error data entry to guest memory */
+ cpu_physical_memory_write(error_block_address + current_block_length,
+ block->data + data_length, block->len - data_length);
+
+ g_array_free(block, true);
+
+ return GHES_CPER_OK;
+}
+
/* Build table for the hardware error fw_cfg blob */
void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linker)
{
@@ -169,3 +250,86 @@ void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_error)
fw_cfg_add_file_callback(s, GHES_DATA_ADDR_FW_CFG_FILE, NULL, NULL, NULL,
&ges.ghes_addr_le, sizeof(ges.ghes_addr_le), false);
}
+
+bool ghes_record_errors(uint32_t notify, uint64_t physical_address)
+{
+ uint64_t error_block_addr, read_ack_register_addr;
+ int read_ack_register = 0, loop = 0;
+ uint64_t start_addr = le32_to_cpu(ges.ghes_addr_le);
+ bool ret = GHES_CPER_FAIL;
+ const uint8_t error_source_id[] = { 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0, 1};
+
+ /*
+ * | +---------------------+ ges.ghes_addr_le
+ * | |error_block_address0|
+ * | +---------------------+
+ * | |error_block_address1|
+ * | +---------------------+ --+--
+ * | | ............. | GHES_ADDRESS_SIZE
+ * | +---------------------+ --+--
+ * | |error_block_addressN|
+ * | +---------------------+
+ * | | read_ack_register0 |
+ * | +---------------------+ --+--
+ * | | read_ack_register1 | GHES_ADDRESS_SIZE
+ * | +---------------------+ --+--
+ * | | ............. |
+ * | +---------------------+
+ * | | read_ack_registerN |
+ * | +---------------------+ --+--
+ * | | CPER | |
+ * | | .... | GHES_MAX_RAW_DATA_LENGT
+ * | | CPER | |
+ * | +---------------------+ --+--
+ * | | .......... |
+ * | +---------------------+
+ * | | CPER |
+ * | | .... |
+ * | | CPER |
+ * | +---------------------+
+ */
+ if (physical_address && notify < ACPI_HEST_NOTIFY_RESERVED) {
+ /* Find and check the source id for this new CPER */
+ if (error_source_id[notify] != 0xff) {
+ start_addr += error_source_id[notify] * GHES_ADDRESS_SIZE;
+ } else {
+ goto out;
+ }
+
+ cpu_physical_memory_read(start_addr, &error_block_addr,
+ GHES_ADDRESS_SIZE);
+
+ read_ack_register_addr = start_addr +
+ ACPI_HEST_ERROR_SOURCE_COUNT * GHES_ADDRESS_SIZE;
+retry:
+ cpu_physical_memory_read(read_ack_register_addr,
+ &read_ack_register, GHES_ADDRESS_SIZE);
+
+ /* zero means OSPM does not acknowledge the error */
+ if (!read_ack_register) {
+ if (loop < 3) {
+ usleep(100 * 1000);
+ loop++;
+ goto retry;
+ } else {
+ error_report("Last time OSPM does not acknowledge the error,"
+ " record CPER failed this time, set the ack value to"
+ " avoid blocking next time CPER record! exit");
+ read_ack_register = 1;
+ cpu_physical_memory_write(read_ack_register_addr,
+ &read_ack_register, GHES_ADDRESS_SIZE);
+ }
+ } else {
+ if (error_block_addr) {
+ read_ack_register = 0;
+ cpu_physical_memory_write(read_ack_register_addr,
+ &read_ack_register, GHES_ADDRESS_SIZE);
+ ret = ghes_record_mem_error(error_block_addr, physical_address);
+ }
+ }
+ }
+
+out:
+ return ret;
+}
diff --git a/include/hw/acpi/acpi_ghes.h b/include/hw/acpi/acpi_ghes.h
index 0a7c6c2..95d22ef 100644
--- a/include/hw/acpi/acpi_ghes.h
+++ b/include/hw/acpi/acpi_ghes.h
@@ -40,6 +40,9 @@
#define GHES_CPER_OK 1
#define GHES_CPER_FAIL 0
+#define GHES_CPER_OK 1
+#define GHES_CPER_FAIL 0
+
/* The max size in bytes for one error block */
#define GHES_MAX_RAW_DATA_LENGTH 0x1000
/* Now only have GPIO-Signal and ARMv8 SEA notification types error sources
@@ -79,4 +82,5 @@ void build_apei_hest(GArray *table_data, GArray *hardware_error,
void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linker);
void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_errors);
+bool ghes_record_errors(uint32_t notify, uint64_t error_physical_addr);
#endif
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 97d8d9d..fd07d62 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -377,7 +377,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id);
/* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */
unsigned long kvm_arch_vcpu_id(CPUState *cpu);
-#ifdef TARGET_I386
+#if defined(TARGET_I386) || defined(TARGET_AARCH64)
#define KVM_HAVE_MCE_INJECTION 1
void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr);
#endif
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 09a86e2..f22dc4e 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -28,6 +28,7 @@
#include "exec/address-spaces.h"
#include "hw/boards.h"
#include "qemu/log.h"
+#include "exec/ram_addr.h"
const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
@@ -176,6 +177,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
+ qemu_register_reset(kvm_unpoison_all, NULL);
+
return 0;
}
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 0ca2b29..913e707 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -27,6 +27,9 @@
#include "kvm_arm.h"
#include "internals.h"
#include "hw/arm/arm.h"
+#include "exec/ram_addr.h"
+#include "hw/acpi/acpi-defs.h"
+#include "hw/acpi/acpi_ghes.h"
static bool have_guest_debug;
@@ -929,6 +932,37 @@ int kvm_arch_get_registers(CPUState *cs)
return ret;
}
+void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr)
+{
+ ram_addr_t ram_addr;
+ hwaddr paddr;
+
+ assert(code == BUS_MCEERR_AR || code == BUS_MCEERR_AO);
+ if (addr) {
+ ram_addr = qemu_ram_addr_from_host(addr);
+ if (ram_addr != RAM_ADDR_INVALID &&
+ kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
+ kvm_hwpoison_page_add(ram_addr);
+ if (code == BUS_MCEERR_AR) {
+ kvm_cpu_synchronize_state(c);
+ if (ghes_record_errors(ACPI_HEST_NOTIFY_SEA, paddr)) {
+ kvm_inject_arm_sea(c);
+ } else {
+ fprintf(stderr, "failed to record the error\n");
+ }
+ }
+ return;
+ }
+ fprintf(stderr, "Hardware memory error for memory used by "
+ "QEMU itself instead of guest system!\n");
+ }
+
+ if (code == BUS_MCEERR_AR) {
+ fprintf(stderr, "Hardware memory error!\n");
+ exit(1);
+ }
+}
+
/* C6.6.29 BRK instruction */
static const uint32_t brk_insn = 0xd4200000;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Dongjiu Geng
@ 2018-11-20 15:15 ` Peter Maydell
2018-11-22 3:05 ` [Qemu-devel] 答复: " gengdongjiu
0 siblings, 1 reply; 22+ messages in thread
From: Peter Maydell @ 2018-11-20 15:15 UTC (permalink / raw)
To: Dongjiu Geng
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
Zheng Xiang, Eduardo Habkost, kvm-devel, Shannon Zhao,
QEMU Developers, qemu-arm
On 8 November 2018 at 10:29, Dongjiu Geng <gengdongjiu@huawei.com> wrote:
> Add SIGBUS signal handler. In this handler, it checks the SIGBUS type,
> translates the host VA delivered by host to guest PA, then fill this PA
> to guest APEI GHES memory, then notify guest according to the SIGBUS type.
> There are two kinds of SIGBUS that QEMU needs to handle, which are
> BUS_MCEERR_AO and BUS_MCEERR_AR.
>
> If guest accesses the poisoned memory, it generates Synchronous External
> Abort(SEA). Then host kernel gets an APEI notification and call memory_failure()
> to unmapped the affected page from the guest's stage 2, finally return
> to guest.
>
> Guest continues to access PG_hwpoison page, it will trap to KVM as stage2 fault,
> then a SIGBUS_MCEERR_AR synchronous signal is delivered to Qemu, Qemu record this
> error into guest APEI GHES memory and notify guest using Synchronous-External-Abort(SEA).
>
> Suggested-by: James Morse <james.morse@arm.com>
> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
> ---
> Address James's comments to record CPER and notify guest for SIGBUS signal handling.
> Shown some discussion in [1].
>
> [1]:
> https://lkml.org/lkml/2017/2/27/246
> https://lkml.org/lkml/2017/9/14/241
> https://lkml.org/lkml/2017/9/22/499
> ---
>
> +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr)
> +{
> + ram_addr_t ram_addr;
> + hwaddr paddr;
> +
> + assert(code == BUS_MCEERR_AR || code == BUS_MCEERR_AO);
> + if (addr) {
> + ram_addr = qemu_ram_addr_from_host(addr);
> + if (ram_addr != RAM_ADDR_INVALID &&
> + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
> + kvm_hwpoison_page_add(ram_addr);
> + if (code == BUS_MCEERR_AR) {
> + kvm_cpu_synchronize_state(c);
> + if (ghes_record_errors(ACPI_HEST_NOTIFY_SEA, paddr)) {
> + kvm_inject_arm_sea(c);
> + } else {
> + fprintf(stderr, "failed to record the error\n");
> + }
Shouldn't there be something in here to say "only report this
error to the guest if we are actually reporting RAS errors
to the guest" ?
> + }
> + return;
> + }
> + fprintf(stderr, "Hardware memory error for memory used by "
> + "QEMU itself instead of guest system!\n");
> + }
> +
> + if (code == BUS_MCEERR_AR) {
> + fprintf(stderr, "Hardware memory error!\n");
> + exit(1);
> + }
> +}
> +
> /* C6.6.29 BRK instruction */
> static const uint32_t brk_insn = 0xd4200000;
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Qemu-devel] 答复: [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2018-11-20 15:15 ` Peter Maydell
@ 2018-11-22 3:05 ` gengdongjiu
2018-11-22 10:28 ` Peter Maydell
0 siblings, 1 reply; 22+ messages in thread
From: gengdongjiu @ 2018-11-22 3:05 UTC (permalink / raw)
To: 'Peter Maydell'
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
zhengxiang (A),
Eduardo Habkost, kvm-devel, Shannon Zhao, QEMU Developers,
qemu-arm
> >
> > +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr) {
> > + ram_addr_t ram_addr;
> > + hwaddr paddr;
> > +
> > + assert(code == BUS_MCEERR_AR || code == BUS_MCEERR_AO);
> > + if (addr) {
> > + ram_addr = qemu_ram_addr_from_host(addr);
> > + if (ram_addr != RAM_ADDR_INVALID &&
> > + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
> > + kvm_hwpoison_page_add(ram_addr);
> > + if (code == BUS_MCEERR_AR) {
> > + kvm_cpu_synchronize_state(c);
> > + if (ghes_record_errors(ACPI_HEST_NOTIFY_SEA, paddr)) {
> > + kvm_inject_arm_sea(c);
> > + } else {
> > + fprintf(stderr, "failed to record the error\n");
> > + }
>
> Shouldn't there be something in here to say "only report this error to the guest if we are actually reporting RAS errors to the guest" ?
Yes, We can say something that such as "report this error to the guest", because this error is indeed triggered by guest, which is guest error.
>
> > + }
> > + return;
> > + }
> > + fprintf(stderr, "Hardware memory error for memory used by "
> > + "QEMU itself instead of guest system!\n");
> > + }
> > +
> > + if (code == BUS_MCEERR_AR) {
> > + fprintf(stderr, "Hardware memory error!\n");
> > + exit(1);
> > + }
> > +}
> > +
> > /* C6.6.29 BRK instruction */
> > static const uint32_t brk_insn = 0xd4200000;
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] 答复: [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2018-11-22 3:05 ` [Qemu-devel] 答复: " gengdongjiu
@ 2018-11-22 10:28 ` Peter Maydell
2018-11-22 10:30 ` Peter Maydell
0 siblings, 1 reply; 22+ messages in thread
From: Peter Maydell @ 2018-11-22 10:28 UTC (permalink / raw)
To: gengdongjiu
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
zhengxiang (A),
Eduardo Habkost, kvm-devel, Shannon Zhao, QEMU Developers,
qemu-arm
On 22 November 2018 at 03:05, gengdongjiu <gengdongjiu@huawei.com> wrote:
>> >
>> > +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr) {
>> > + ram_addr_t ram_addr;
>> > + hwaddr paddr;
>> > +
>> > + assert(code == BUS_MCEERR_AR || code == BUS_MCEERR_AO);
>> > + if (addr) {
>> > + ram_addr = qemu_ram_addr_from_host(addr);
>> > + if (ram_addr != RAM_ADDR_INVALID &&
>> > + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
>> > + kvm_hwpoison_page_add(ram_addr);
>> > + if (code == BUS_MCEERR_AR) {
>> > + kvm_cpu_synchronize_state(c);
>> > + if (ghes_record_errors(ACPI_HEST_NOTIFY_SEA, paddr)) {
>> > + kvm_inject_arm_sea(c);
>> > + } else {
>> > + fprintf(stderr, "failed to record the error\n");
>> > + }
>>
>> Shouldn't there be something in here to say "only report this error to the guest if we are actually reporting RAS errors to the guest" ?
>
> Yes, We can say something that such as "report this error to the guest", because this error is indeed triggered by guest, which is guest error.
I'm afraid I don't really understand what you mean. Could you
try rephrasing it?
My understanding was:
* we get this signal if there is a RAS error in the host memory
* if we are exposing RAS errors to the guest (ie we have
told it that in the ACPI table we passed it at startup)
then we should pass on this error to the guest
but that these are two different conditions.
If the host hardware detects a RAS error in memory used
by the guest but the guest is not being told about RAS
errors, then we cannot report the error: we have no mechanism
to do so, and the guest is not expecting it.
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] 答复: [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM
2018-11-22 10:28 ` Peter Maydell
@ 2018-11-22 10:30 ` Peter Maydell
0 siblings, 0 replies; 22+ messages in thread
From: Peter Maydell @ 2018-11-22 10:30 UTC (permalink / raw)
To: gengdongjiu
Cc: Igor Mammedov, Michael S. Tsirkin, Laszlo Ersek, Marc Zyngier,
James Morse, Paolo Bonzini, Marcelo Tosatti, Richard Henderson,
zhengxiang (A),
Eduardo Habkost, kvm-devel, Shannon Zhao, QEMU Developers,
qemu-arm
On 22 November 2018 at 10:28, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 22 November 2018 at 03:05, gengdongjiu <gengdongjiu@huawei.com> wrote:
>>> >
>>> Shouldn't there be something in here to say "only report this error to the guest if we are actually reporting RAS errors to the guest" ?
>>
>> Yes, We can say something that such as "report this error to the guest", because this error is indeed triggered by guest, which is guest error.
>
> I'm afraid I don't really understand what you mean. Could you
> try rephrasing it?
>
> My understanding was:
> * we get this signal if there is a RAS error in the host memory
> * if we are exposing RAS errors to the guest (ie we have
> told it that in the ACPI table we passed it at startup)
> then we should pass on this error to the guest
>
> but that these are two different conditions.
>
> If the host hardware detects a RAS error in memory used
> by the guest but the guest is not being told about RAS
> errors, then we cannot report the error: we have no mechanism
> to do so, and the guest is not expecting it.
If you look at the x86 version of this function you can see that
it tests (env->mcg_cap & MCG_SER_P), which I think is the
equivalent x86 "is the guest CPU/config one we can report
these errors to" test.
thanks
-- PMM
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (9 preceding siblings ...)
2018-11-08 10:29 ` [Qemu-devel] [PATCH RESEND v15 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM Dongjiu Geng
@ 2018-11-08 22:42 ` no-reply
2018-11-08 22:52 ` no-reply
11 siblings, 0 replies; 22+ messages in thread
From: no-reply @ 2018-11-08 22:42 UTC (permalink / raw)
To: gengdongjiu
Cc: famz, imammedo, mst, peter.maydell, lersek, marc.zyngier,
james.morse, pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1541672989-15967-1-git-send-email-gengdongjiu@huawei.com
Subject: [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
a8cb7527de target-arm: kvm64: handle SIGBUS signal from kernel or KVM
a09df9f86c hw/arm/virt: Add RAS platform version for migration
a7b73559b9 target-arm: kvm64: inject synchronous External Abort
7384bffff8 KVM: Move related hwpoison page functions to accel/kvm/ folder
bf8853a0aa docs: APEI GHES generation and CPER record description
d0d850cc13 ACPI: Add APEI GHES table generation and CPER record support
4dc5021697 acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block
2be8ee4f11 acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry
5509af96ba acpi: add build_append_ghes_notify() helper for Hardware Error Notification
ac64a81aed ACPI: add some GHES structures and macros definition
=== OUTPUT BEGIN ===
Checking PATCH 1/10: ACPI: add some GHES structures and macros definition...
Checking PATCH 2/10: acpi: add build_append_ghes_notify() helper for Hardware Error Notification...
Checking PATCH 3/10: acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry...
Checking PATCH 4/10: acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block...
Checking PATCH 5/10: ACPI: Add APEI GHES table generation and CPER record support...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#43:
new file mode 100644
WARNING: line over 80 characters
#103: FILE: hw/acpi/acpi_ghes.c:56:
+ build_append_int_noprefix((void *)hardware_errors, 1, GHES_ADDRESS_SIZE);
WARNING: line over 80 characters
#131: FILE: hw/acpi/acpi_ghes.c:84:
+ build_append_int_noprefix(table_data, cpu_to_le16(i), 2); /* source id */
WARNING: line over 80 characters
#132: FILE: hw/acpi/acpi_ghes.c:85:
+ build_append_int_noprefix(table_data, 0xffff, 2); /* related source id */
WARNING: line over 80 characters
#145: FILE: hw/acpi/acpi_ghes.c:98:
+ build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0);
WARNING: line over 80 characters
#169: FILE: hw/acpi/acpi_ghes.c:122:
+ build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0);
ERROR: line over 90 characters
#306: FILE: include/hw/acpi/acpi_ghes.h:29:
+/* The size of Address field in Generic Address Structure, ACPI 2.0/3.0: 5.2.3.1 Generic Address
total: 1 errors, 6 warnings, 311 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 6/10: docs: APEI GHES generation and CPER record description...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#12:
new file mode 100644
total: 0 errors, 1 warnings, 97 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 7/10: KVM: Move related hwpoison page functions to accel/kvm/ folder...
Checking PATCH 8/10: target-arm: kvm64: inject synchronous External Abort...
Checking PATCH 9/10: hw/arm/virt: Add RAS platform version for migration...
Checking PATCH 10/10: target-arm: kvm64: handle SIGBUS signal from kernel or KVM...
WARNING: line over 80 characters
#72: FILE: hw/acpi/acpi_ghes.c:68:
+ current_block_length = sizeof(AcpiGenericErrorStatus) + le32_to_cpu(data_length);
WARNING: line over 80 characters
#81: FILE: hw/acpi/acpi_ghes.c:77:
+ if ((data_length + sizeof(AcpiGenericErrorStatus)) > GHES_MAX_RAW_DATA_LENGTH) {
WARNING: line over 80 characters
#86: FILE: hw/acpi/acpi_ghes.c:82:
+ build_append_ghes_generic_status(block, cpu_to_le32(ACPI_GEBS_UNCORRECTABLE), 0, 0,
WARNING: line over 80 characters
#98: FILE: hw/acpi/acpi_ghes.c:94:
+ cpu_to_le32(ACPI_CPER_SEV_RECOVERABLE), cpu_to_le32(0x300), 0, 0,
WARNING: line over 80 characters
#99: FILE: hw/acpi/acpi_ghes.c:95:
+ cpu_to_le32(80)/* the total size of Memory Error Record */, fru_id,
total: 0 errors, 5 warnings, 256 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU
2018-11-08 10:29 [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU Dongjiu Geng
` (10 preceding siblings ...)
2018-11-08 22:42 ` [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU no-reply
@ 2018-11-08 22:52 ` no-reply
11 siblings, 0 replies; 22+ messages in thread
From: no-reply @ 2018-11-08 22:52 UTC (permalink / raw)
To: gengdongjiu
Cc: famz, imammedo, mst, peter.maydell, lersek, marc.zyngier,
james.morse, pbonzini, mtosatti, rth, zhengxiang9, ehabkost, kvm,
shannon.zhaosl, qemu-devel, qemu-arm
Hi,
This series failed docker-quick@centos7 build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1541672989-15967-1-git-send-email-gengdongjiu@huawei.com
Subject: [Qemu-devel] [PATCH RESEND v15 00/10] Add ARMv8 RAS virtualization support in QEMU
=== TEST SCRIPT BEGIN ===
#!/bin/bash
time make docker-test-quick@centos7 SHOW_ENV=1 J=8
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
a8cb7527de target-arm: kvm64: handle SIGBUS signal from kernel or KVM
a09df9f86c hw/arm/virt: Add RAS platform version for migration
a7b73559b9 target-arm: kvm64: inject synchronous External Abort
7384bffff8 KVM: Move related hwpoison page functions to accel/kvm/ folder
bf8853a0aa docs: APEI GHES generation and CPER record description
d0d850cc13 ACPI: Add APEI GHES table generation and CPER record support
4dc5021697 acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block
2be8ee4f11 acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry
5509af96ba acpi: add build_append_ghes_notify() helper for Hardware Error Notification
ac64a81aed ACPI: add some GHES structures and macros definition
=== OUTPUT BEGIN ===
BUILD centos7
make[1]: Entering directory '/var/tmp/patchew-tester-tmp-bt40wlf7/src'
GEN /var/tmp/patchew-tester-tmp-bt40wlf7/src/docker-src.2018-11-08-17.50.11.11855/qemu.tar
Cloning into '/var/tmp/patchew-tester-tmp-bt40wlf7/src/docker-src.2018-11-08-17.50.11.11855/qemu.tar.vroot'...
done.
Your branch is up-to-date with 'origin/test'.
Submodule 'dtc' (git://git.qemu-project.org/dtc.git) registered for path 'dtc'
Cloning into '/var/tmp/patchew-tester-tmp-bt40wlf7/src/docker-src.2018-11-08-17.50.11.11855/qemu.tar.vroot/dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Submodule 'ui/keycodemapdb' (git://git.qemu.org/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into '/var/tmp/patchew-tester-tmp-bt40wlf7/src/docker-src.2018-11-08-17.50.11.11855/qemu.tar.vroot/ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
COPY RUNNER
RUN test-quick in qemu:centos7
Packages installed:
SDL-devel-1.2.15-14.el7.x86_64
bison-3.0.4-1.el7.x86_64
bzip2-1.0.6-13.el7.x86_64
bzip2-devel-1.0.6-13.el7.x86_64
ccache-3.3.4-1.el7.x86_64
csnappy-devel-0-6.20150729gitd7bc683.el7.x86_64
flex-2.5.37-3.el7.x86_64
gcc-4.8.5-28.el7_5.1.x86_64
gettext-0.19.8.1-2.el7.x86_64
git-1.8.3.1-14.el7_5.x86_64
glib2-devel-2.54.2-2.el7.x86_64
libaio-devel-0.3.109-13.el7.x86_64
libepoxy-devel-1.3.1-2.el7_5.x86_64
libfdt-devel-1.4.6-1.el7.x86_64
lzo-devel-2.06-8.el7.x86_64
make-3.82-23.el7.x86_64
mesa-libEGL-devel-17.2.3-8.20171019.el7.x86_64
mesa-libgbm-devel-17.2.3-8.20171019.el7.x86_64
nettle-devel-2.7.1-8.el7.x86_64
package g++ is not installed
package librdmacm-devel is not installed
pixman-devel-0.34.0-1.el7.x86_64
spice-glib-devel-0.34-3.el7_5.1.x86_64
spice-server-devel-0.14.0-2.el7_5.4.x86_64
tar-1.26-34.el7.x86_64
vte-devel-0.28.2-10.el7.x86_64
xen-devel-4.6.6-12.el7.x86_64
zlib-devel-1.2.7-17.el7.x86_64
Environment variables:
PACKAGES=bison bzip2 bzip2-devel ccache csnappy-devel flex g++ gcc gettext git glib2-devel libaio-devel libepoxy-devel libfdt-devel librdmacm-devel lzo-devel make mesa-libEGL-devel mesa-libgbm-devel nettle-devel pixman-devel SDL-devel spice-glib-devel spice-server-devel tar vte-devel xen-devel zlib-devel
HOSTNAME=89ecf82ccf75
MAKEFLAGS= -j8
J=8
CCACHE_DIR=/var/tmp/ccache
EXTRA_CONFIGURE_OPTS=
V=
SHOW_ENV=1
PATH=/usr/lib/ccache:/usr/lib64/ccache:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin
PWD=/
TARGET_LIST=
SHLVL=1
HOME=/home/patchew
TEST_DIR=/tmp/qemu-test
FEATURES= dtc
DEBUG=
_=/usr/bin/env
Configure options:
--enable-werror --target-list=x86_64-softmmu,aarch64-softmmu --prefix=/tmp/qemu-test/install
No C++ compiler available; disabling C++ specific optional code
Install prefix /tmp/qemu-test/install
BIOS directory /tmp/qemu-test/install/share/qemu
firmware path /tmp/qemu-test/install/share/qemu-firmware
binary directory /tmp/qemu-test/install/bin
library directory /tmp/qemu-test/install/lib
module directory /tmp/qemu-test/install/lib/qemu
libexec directory /tmp/qemu-test/install/libexec
include directory /tmp/qemu-test/install/include
config directory /tmp/qemu-test/install/etc
local state directory /tmp/qemu-test/install/var
Manual directory /tmp/qemu-test/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /tmp/qemu-test/src
GIT binary git
GIT submodules
C compiler cc
Host C compiler cc
C++ compiler
Objective-C compiler cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -fPIE -DPIE -m64 -mcx16 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -Wno-missing-braces -I/usr/include/libpng15 -pthread -I/usr/include/spice-server -I/usr/include/cacard -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/spice-1
LDFLAGS -Wl,--warn-common -Wl,-z,relro -Wl,-z,now -pie -m64 -g
QEMU_LDFLAGS
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU x86_64
host big endian no
target list x86_64-softmmu aarch64-softmmu
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
SDL support yes (1.2.15)
GTK support no
GTK GL support no
VTE support no
TLS priority NORMAL
GNUTLS support no
libgcrypt no
nettle yes (2.7.1)
libtasn1 no
curses support yes
virgl support no
curl support no
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support no
Multipath support no
VNC support yes
VNC SASL support no
VNC JPEG support no
VNC PNG support yes
xen support yes
xen ctrl version 40600
pv dom build no
brlapi support no
bluez support no
Documentation no
PIE yes
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
HVF support no
WHPX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
malloc trim support yes
RDMA support yes
PVRDMA support yes
fdt support system
membarrier no
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
posix_memalign yes
libcap-ng support no
vhost-net support yes
vhost-crypto support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support yes (0.12.13/0.14.0)
rbd support no
xfsctl support no
smartcard support yes
libusb no
usb net redir no
OpenGL support yes
OpenGL dmabufs yes
libiscsi support no
libnfs support no
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support no
coroutine backend ucontext
coroutine pool yes
debug stack usage no
mutex debugging no
crypto afalg no
GlusterFS support no
gcov gcov
gcov enabled no
TPM support yes
libssh2 support no
TPM passthrough yes
TPM emulator yes
QOM debugging yes
Live block migration yes
lzo support yes
snappy support no
bzip2 support yes
NUMA host support no
libxml2 no
tcmalloc support no
jemalloc support no
avx2 optimization yes
replication support yes
VxHS block device no
capstone no
docker no
libpmem support no
libudev no
WARNING: Use of SDL 1.2 is deprecated and will be removed in
WARNING: future releases. Please switch to using SDL 2.0
NOTE: cross-compilers enabled: 'cc'
GEN x86_64-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak.tmp
GEN qemu-options.def
GEN config-host.h
GEN qapi-gen
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN aarch64-softmmu/config-devices.mak
GEN trace/generated-helpers.c
GEN x86_64-softmmu/config-devices.mak
GEN module_block.h
GEN ui/input-keymap-linux-to-qcode.c
GEN ui/input-keymap-atset1-to-qcode.c
GEN ui/input-keymap-qcode-to-atset1.c
GEN ui/input-keymap-qcode-to-atset2.c
GEN ui/input-keymap-qcode-to-atset3.c
GEN ui/input-keymap-qcode-to-linux.c
GEN ui/input-keymap-qcode-to-qnum.c
GEN ui/input-keymap-qcode-to-sun.c
GEN ui/input-keymap-qnum-to-qcode.c
GEN ui/input-keymap-usb-to-qcode.c
GEN ui/input-keymap-win32-to-qcode.c
GEN ui/input-keymap-x11-to-qcode.c
GEN ui/input-keymap-xorgevdev-to-qcode.c
GEN ui/input-keymap-xorgkbd-to-qcode.c
GEN ui/input-keymap-xorgxquartz-to-qcode.c
GEN ui/input-keymap-xorgxwin-to-qcode.c
GEN ui/input-keymap-osx-to-qcode.c
GEN tests/test-qapi-gen
GEN trace-root.h
GEN accel/kvm/trace.h
GEN accel/tcg/trace.h
GEN audio/trace.h
GEN block/trace.h
GEN chardev/trace.h
GEN crypto/trace.h
GEN hw/9pfs/trace.h
GEN hw/acpi/trace.h
GEN hw/alpha/trace.h
GEN hw/arm/trace.h
GEN hw/audio/trace.h
GEN hw/block/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/display/trace.h
GEN hw/dma/trace.h
GEN hw/hppa/trace.h
GEN hw/i2c/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/ide/trace.h
GEN hw/input/trace.h
GEN hw/intc/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/misc/trace.h
GEN hw/misc/macio/trace.h
GEN hw/net/trace.h
GEN hw/nvram/trace.h
GEN hw/pci/trace.h
GEN hw/pci-host/trace.h
GEN hw/ppc/trace.h
GEN hw/rdma/trace.h
GEN hw/rdma/vmw/trace.h
GEN hw/s390x/trace.h
GEN hw/scsi/trace.h
GEN hw/sd/trace.h
GEN hw/sparc/trace.h
GEN hw/sparc64/trace.h
GEN hw/timer/trace.h
GEN hw/tpm/trace.h
GEN hw/usb/trace.h
GEN hw/vfio/trace.h
GEN hw/virtio/trace.h
GEN hw/watchdog/trace.h
GEN hw/xen/trace.h
GEN io/trace.h
GEN linux-user/trace.h
GEN migration/trace.h
GEN nbd/trace.h
GEN net/trace.h
GEN qapi/trace.h
GEN qom/trace.h
GEN scsi/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/ppc/trace.h
GEN target/s390x/trace.h
GEN target/sparc/trace.h
GEN ui/trace.h
GEN util/trace.h
GEN trace-root.c
GEN accel/kvm/trace.c
GEN accel/tcg/trace.c
GEN audio/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN crypto/trace.c
GEN hw/9pfs/trace.c
GEN hw/acpi/trace.c
GEN hw/alpha/trace.c
GEN hw/arm/trace.c
GEN hw/audio/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/display/trace.c
GEN hw/dma/trace.c
GEN hw/hppa/trace.c
GEN hw/i2c/trace.c
GEN hw/i386/trace.c
GEN hw/i386/xen/trace.c
GEN hw/ide/trace.c
GEN hw/input/trace.c
GEN hw/intc/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/misc/trace.c
GEN hw/misc/macio/trace.c
GEN hw/net/trace.c
GEN hw/nvram/trace.c
GEN hw/pci/trace.c
GEN hw/pci-host/trace.c
GEN hw/ppc/trace.c
GEN hw/rdma/trace.c
GEN hw/rdma/vmw/trace.c
GEN hw/s390x/trace.c
GEN hw/scsi/trace.c
GEN hw/sd/trace.c
GEN hw/sparc/trace.c
GEN hw/sparc64/trace.c
GEN hw/timer/trace.c
GEN hw/tpm/trace.c
GEN hw/usb/trace.c
GEN hw/vfio/trace.c
GEN hw/virtio/trace.c
GEN hw/watchdog/trace.c
GEN hw/xen/trace.c
GEN io/trace.c
GEN linux-user/trace.c
GEN migration/trace.c
GEN nbd/trace.c
GEN net/trace.c
GEN qapi/trace.c
GEN qom/trace.c
GEN scsi/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/ppc/trace.c
GEN target/s390x/trace.c
GEN target/sparc/trace.c
GEN ui/trace.c
GEN util/trace.c
GEN config-all-devices.mak
CC tests/qemu-iotests/socket_scm_helper.o
GEN qga/qapi-generated/qapi-gen
CC qapi/qapi-builtin-types.o
CC qapi/qapi-types-block-core.o
CC qapi/qapi-types.o
CC qapi/qapi-types-char.o
CC qapi/qapi-types-common.o
CC qapi/qapi-types-block.o
CC qapi/qapi-types-crypto.o
CC qapi/qapi-types-introspect.o
CC qapi/qapi-types-job.o
CC qapi/qapi-types-migration.o
CC qapi/qapi-types-misc.o
CC qapi/qapi-types-net.o
CC qapi/qapi-types-rocker.o
CC qapi/qapi-types-run-state.o
CC qapi/qapi-types-sockets.o
CC qapi/qapi-types-tpm.o
CC qapi/qapi-types-trace.o
CC qapi/qapi-types-transaction.o
CC qapi/qapi-types-ui.o
CC qapi/qapi-visit.o
CC qapi/qapi-builtin-visit.o
CC qapi/qapi-visit-block-core.o
CC qapi/qapi-visit-block.o
CC qapi/qapi-visit-char.o
CC qapi/qapi-visit-common.o
CC qapi/qapi-visit-crypto.o
CC qapi/qapi-visit-introspect.o
CC qapi/qapi-visit-job.o
CC qapi/qapi-visit-migration.o
CC qapi/qapi-visit-misc.o
CC qapi/qapi-visit-net.o
CC qapi/qapi-visit-rocker.o
CC qapi/qapi-visit-run-state.o
CC qapi/qapi-visit-sockets.o
CC qapi/qapi-visit-tpm.o
CC qapi/qapi-visit-transaction.o
CC qapi/qapi-visit-trace.o
CC qapi/qapi-visit-ui.o
CC qapi/qapi-events.o
CC qapi/qapi-events-block-core.o
CC qapi/qapi-events-block.o
CC qapi/qapi-events-char.o
CC qapi/qapi-events-common.o
CC qapi/qapi-events-crypto.o
CC qapi/qapi-events-introspect.o
CC qapi/qapi-events-job.o
CC qapi/qapi-events-migration.o
CC qapi/qapi-events-misc.o
CC qapi/qapi-events-net.o
CC qapi/qapi-events-rocker.o
CC qapi/qapi-events-run-state.o
CC qapi/qapi-events-sockets.o
CC qapi/qapi-events-tpm.o
CC qapi/qapi-events-trace.o
CC qapi/qapi-events-transaction.o
CC qapi/qapi-events-ui.o
CC qapi/qapi-visit-core.o
CC qapi/qobject-input-visitor.o
CC qapi/qapi-introspect.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/opts-visitor.o
CC qapi/string-output-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qapi-util.o
CC qapi/qmp-event.o
CC qobject/qnull.o
CC qobject/qnum.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qlit.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC qobject/block-qdict.o
CC trace/control.o
CC util/osdep.o
CC trace/qmp.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/aio-wait.o
CC util/thread-pool.o
CC util/qemu-timer.o
CC util/iohandler.o
CC util/main-loop.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/oslib-posix.o
CC util/qemu-openpty.o
CC util/memfd.o
CC util/envlist.o
CC util/qemu-thread-posix.o
CC util/path.o
CC util/module.o
CC util/bitmap.o
CC util/host-utils.o
CC util/hbitmap.o
CC util/bitops.o
CC util/fifo8.o
CC util/cacheinfo.o
CC util/acl.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/qemu-config.o
CC util/iov.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/pagesize.o
CC util/qsp.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/systemd.o
CC util/iova-tree.o
CC util/drm.o
CC util/vfio-helpers.o
CC trace-root.o
CC accel/tcg/trace.o
CC accel/kvm/trace.o
CC audio/trace.o
CC block/trace.o
CC chardev/trace.o
CC crypto/trace.o
CC hw/acpi/trace.o
CC hw/9pfs/trace.o
CC hw/alpha/trace.o
CC hw/audio/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/arm/trace.o
CC hw/char/trace.o
CC hw/display/trace.o
CC hw/dma/trace.o
CC hw/hppa/trace.o
CC hw/i2c/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/ide/trace.o
CC hw/input/trace.o
CC hw/isa/trace.o
CC hw/intc/trace.o
CC hw/mem/trace.o
CC hw/misc/trace.o
CC hw/misc/macio/trace.o
CC hw/net/trace.o
CC hw/pci/trace.o
CC hw/nvram/trace.o
CC hw/pci-host/trace.o
CC hw/ppc/trace.o
CC hw/rdma/trace.o
CC hw/rdma/vmw/trace.o
CC hw/s390x/trace.o
CC hw/scsi/trace.o
CC hw/sd/trace.o
CC hw/sparc/trace.o
CC hw/sparc64/trace.o
CC hw/timer/trace.o
CC hw/tpm/trace.o
CC hw/usb/trace.o
CC hw/vfio/trace.o
CC hw/watchdog/trace.o
CC hw/xen/trace.o
CC hw/virtio/trace.o
CC linux-user/trace.o
CC io/trace.o
CC migration/trace.o
CC net/trace.o
CC nbd/trace.o
CC qapi/trace.o
CC qom/trace.o
CC scsi/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/ppc/trace.o
CC target/s390x/trace.o
CC target/sparc/trace.o
CC ui/trace.o
CC util/trace.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-def.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/cpu-get-clock.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/migr-blocker.o
CC stubs/set-fd-handler.o
CC stubs/runstate-check.o
CC stubs/replay.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/trace-control.o
CC stubs/tpm.o
CC stubs/uuid.o
CC stubs/vm-stop.o
CC stubs/vmstate.o
CC stubs/qmp_memory_device.o
CC stubs/target-monitor-defs.o
CC stubs/target-get-monitor-def.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/vmgenid.o
CC stubs/xen-common.o
CC stubs/xen-hvm.o
CC stubs/pci-host-piix.o
CC stubs/ram-block.o
CC stubs/ramfb.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC qemu-nbd.o
CC block.o
CC blockjob.o
CC job.o
CC qemu-io-cmds.o
CC replication.o
CC block/raw-format.o
CC block/vdi.o
CC block/qcow.o
CC block/cloop.o
CC block/vmdk.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/qcow2.o
CC block/dmg.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed-l2-cache.o
CC block/qed.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkverify.o
CC block/blkdebug.o
CC block/blkreplay.o
CC block/blklogwrites.o
CC block/block-backend.o
CC block/qapi.o
CC block/snapshot.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/create.o
CC block/nvme.o
CC block/nbd-client.o
CC block/nbd.o
CC block/throttle-groups.o
CC block/sheepdog.o
CC block/dirty-bitmap.o
CC block/accounting.o
CC block/write-threshold.o
CC block/backup.o
CC block/replication.o
CC block/throttle.o
CC block/crypto.o
CC nbd/server.o
CC nbd/common.o
CC block/copy-on-read.o
CC nbd/client.o
CC scsi/utils.o
CC scsi/pr-manager.o
CC scsi/pr-manager-helper.o
CC block/dmg-bz2.o
CC crypto/init.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/desrfb.o
CC crypto/aes.o
CC crypto/cipher.o
CC crypto/tlscredsanon.o
CC crypto/tlscreds.o
CC crypto/tlscredspsk.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/random-platform.o
CC crypto/pbkdf.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-luks.o
CC crypto/block-qcow.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/net-listener.o
CC io/task.o
CC qom/object.o
CC qom/qom-qobject.o
CC qom/container.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-edid.o
CC qemu-io.o
CC hw/display/edid-generate.o
CC scsi/qemu-pr-helper.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC iothread.o
CC bootdevice.o
CC job-qmp.o
CC qdev-monitor.o
CC device-hotplug.o
CC bt-vhci.o
CC bt-host.o
CC os-posix.o
CC dma-helpers.o
CC vl.o
CC tpm.o
CC device_tree.o
CC qapi/qapi-commands.o
CC qapi/qapi-commands-block-core.o
CC qapi/qapi-commands-block.o
CC qapi/qapi-commands-char.o
CC qapi/qapi-commands-common.o
CC qapi/qapi-commands-crypto.o
CC qapi/qapi-commands-introspect.o
CC qapi/qapi-commands-job.o
CC qapi/qapi-commands-migration.o
CC qapi/qapi-commands-net.o
CC qapi/qapi-commands-rocker.o
CC qapi/qapi-commands-misc.o
CC qapi/qapi-commands-run-state.o
CC qapi/qapi-commands-sockets.o
CC qapi/qapi-commands-tpm.o
CC qapi/qapi-commands-trace.o
CC qapi/qapi-commands-transaction.o
CC qapi/qapi-commands-ui.o
CC hmp.o
CC qmp.o
CC audio/audio.o
CC cpus-common.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/spiceaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-file.o
CC backends/hostmem-ram.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC backends/cryptodev-vhost.o
CC backends/cryptodev-vhost-user.o
CC backends/hostmem-memfd.o
CC block/stream.o
CC chardev/msmouse.o
CC chardev/wctablet.o
CC chardev/testdev.o
CC chardev/spice.o
CC disas/arm.o
CC disas/i386.o
CC fsdev/qemu-fsdev-dummy.o
CC fsdev/qemu-fsdev-throttle.o
CC fsdev/qemu-fsdev-opts.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_ghes.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/ac97.o
CC hw/audio/es1370.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/gusemu_hal.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/lm4549.o
CC hw/audio/pl041.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/soundhw.o
CC hw/block/cdrom.o
CC hw/block/block.o
CC hw/block/hd-geometry.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/xen_disk.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/sdp.o
CC hw/bt/hci.o
CC hw/bt/hid.o
CC hw/bt/hci-csr.o
CC hw/char/ipoctal232.o
CC hw/char/nrf51_uart.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/parallel-isa.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/xen_console.o
CC hw/char/cadence_uart.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/debugcon.o
CC hw/core/qdev.o
CC hw/char/imx_serial.o
CC hw/core/bus.o
CC hw/core/qdev-properties.o
CC hw/core/reset.o
CC hw/core/qdev-fw.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/stream.o
CC hw/core/sysbus.o
CC hw/core/ptimer.o
CC hw/core/loader.o
CC hw/core/machine.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/generic-loader.o
CC hw/core/platform-bus.o
CC hw/core/null-machine.o
CC hw/core/split-irq.o
CC hw/cpu/core.o
CC hw/display/ramfb.o
CC hw/display/ramfb-standalone.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/cirrus_vga_isa.o
CC hw/display/pl110.o
CC hw/display/sii9022.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/xenfb.o
CC hw/display/vga-pci.o
CC hw/display/edid-region.o
CC hw/display/vga-isa.o
CC hw/display/bochs-display.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/tc6393xb.o
CC hw/display/qxl.o
CC hw/display/qxl-render.o
CC hw/display/qxl-logger.o
CC hw/dma/pl330.o
CC hw/dma/pl080.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/xlnx-zdma.o
CC hw/gpio/max7310.o
CC hw/gpio/pl061.o
CC hw/gpio/zaurus.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/pci.o
CC hw/ide/qdev.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/ide/ahci-allwinner.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/tsc2005.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-host.o
CC hw/input/stellaris_input.o
CC hw/input/virtio-input-hid.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/xlnx-pmu-iomod-intc.o
CC hw/intc/imx_gpcv2.o
CC hw/intc/xlnx-zynqmp-ipi.o
CC hw/intc/imx_avic.o
CC hw/intc/realview_gic.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/intc.o
CC hw/intc/arm_gicv3_dist.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/isa-superio.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/isa/apm.o
CC hw/mem/pc-dimm.o
CC hw/mem/memory-device.o
CC hw/misc/applesmc.o
CC hw/mem/nvdimm.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/debugexit.o
CC hw/misc/sga.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/edu.o
CC hw/misc/pca9552.o
CC hw/misc/unimp.o
CC hw/misc/vmcoreinfo.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/net/xen_nic.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/xgmac.o
CC hw/net/xilinx_axienet.o
CC hw/net/imx_fec.o
CC hw/net/allwinner_emac.o
CC hw/net/stellaris_enet.o
CC hw/net/cadence_gem.o
CC hw/net/ftgmac100.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/net/can/can_sja1000.o
CC hw/net/can/can_kvaser_pci.o
CC hw/net/can/can_pcm3680_pci.o
CC hw/net/can/can_mioe3680_pci.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pcie_pci_bridge.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-host/pam.o
CC hw/pci-host/versatile.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/designware.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pci/pcie_aer.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/sd/sdmmc-internal.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/ssi/mss-spi.o
CC hw/timer/arm_timer.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/pl031.o
CC hw/timer/twl92230.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/xlnx-zynqmp-rtc.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/timer/cmsdk-apb-dualtimer.o
CC hw/timer/mss-timer.o
CC hw/tpm/tpm_util.o
CC hw/tpm/tpm_tis.o
CC hw/tpm/tpm_crb.o
CC hw/tpm/tpm_passthrough.o
CC hw/tpm/tpm_emulator.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/host-stub.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/cmsdk-apb-watchdog.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_aspeed.o
CC hw/xen/xen_backend.o
CC hw/xen/xen_devconfig.o
CC hw/xen/xen_pvdev.o
CC hw/xen/xen-common.o
CC migration/migration.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/global_state.o
CC migration/qemu-file-channel.o
CC migration/postcopy-ram.o
CC migration/xbzrle.o
CC migration/qjson.o
CC migration/block-dirty-bitmap.o
CC migration/rdma.o
CC net/net.o
CC migration/block.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/filter-rewriter.o
CC net/colo.o
CC net/filter-replay.o
CC net/tap.o
CC net/tap-linux.o
CC net/can/can_core.o
CC net/can/can_host.o
CC qom/cpu.o
CC net/can/can_socketcan.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC slirp/if.o
CC slirp/cksum.o
CC replay/replay-audio.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_timer.o
CC slirp/tcp_subr.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/ndp_table.o
CC slirp/arp_table.o
CC slirp/ncsi.o
CC ui/keymaps.o
CC ui/console.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-keymap.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/spice-core.o
CC ui/spice-input.o
CC ui/spice-display.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
VERT ui/shader/texture-blit-vert.h
FRAG ui/shader/texture-blit-frag.h
VERT ui/shader/texture-blit-flip-vert.h
CC ui/console-gl.o
CC ui/egl-helpers.o
CC ui/egl-context.o
CC ui/egl-headless.o
CC audio/ossaudio.o
CC ui/sdl.o
CC ui/sdl_zoom.o
CC ui/x_keymap.o
CC ui/curses.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-serial.o
CC chardev/char-ringbuf.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
LINK tests/qemu-iotests/socket_scm_helper
CC qga/commands.o
CC qga/guest-agent-command-state.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qapi-commands.o
AR libqemuutil.a
CC qemu-img.o
CC ui/shader.o
AS optionrom/multiboot.o
AS optionrom/linuxboot.o
AS optionrom/kvmvapic.o
CC optionrom/linuxboot_dma.o
BUILD optionrom/linuxboot_dma.img
BUILD optionrom/multiboot.img
BUILD optionrom/kvmvapic.img
BUILD optionrom/linuxboot.img
BUILD optionrom/linuxboot_dma.raw
BUILD optionrom/multiboot.raw
BUILD optionrom/kvmvapic.raw
SIGN optionrom/linuxboot_dma.bin
BUILD optionrom/linuxboot.raw
SIGN optionrom/multiboot.bin
SIGN optionrom/kvmvapic.bin
SIGN optionrom/linuxboot.bin
LINK qemu-ga
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
LINK qemu-img
LINK qemu-io
LINK qemu-edid
LINK scsi/qemu-pr-helper
LINK qemu-bridge-helper
GEN x86_64-softmmu/hmp-commands.h
GEN x86_64-softmmu/hmp-commands-info.h
GEN x86_64-softmmu/config-target.h
CC x86_64-softmmu/exec.o
CC x86_64-softmmu/tcg/tcg.o
CC x86_64-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/tcg/tcg-op-vec.o
CC x86_64-softmmu/tcg/tcg-op-gvec.o
CC x86_64-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/tcg/optimize.o
CC x86_64-softmmu/fpu/softfloat.o
CC x86_64-softmmu/disas.o
GEN aarch64-softmmu/hmp-commands.h
GEN x86_64-softmmu/gdbstub-xml.c
GEN aarch64-softmmu/hmp-commands-info.h
GEN aarch64-softmmu/config-target.h
CC aarch64-softmmu/exec.o
CC aarch64-softmmu/tcg/tcg.o
CC aarch64-softmmu/tcg/tcg-op.o
CC x86_64-softmmu/arch_init.o
CC x86_64-softmmu/cpus.o
CC aarch64-softmmu/tcg/tcg-op-vec.o
CC aarch64-softmmu/tcg/tcg-op-gvec.o
CC aarch64-softmmu/tcg/tcg-common.o
CC x86_64-softmmu/monitor.o
CC aarch64-softmmu/tcg/optimize.o
CC aarch64-softmmu/fpu/softfloat.o
CC aarch64-softmmu/disas.o
GEN aarch64-softmmu/gdbstub-xml.c
CC aarch64-softmmu/arch_init.o
CC x86_64-softmmu/gdbstub.o
CC aarch64-softmmu/cpus.o
CC aarch64-softmmu/monitor.o
CC x86_64-softmmu/balloon.o
CC x86_64-softmmu/ioport.o
CC aarch64-softmmu/gdbstub.o
CC aarch64-softmmu/balloon.o
CC aarch64-softmmu/ioport.o
CC x86_64-softmmu/numa.o
CC aarch64-softmmu/numa.o
CC aarch64-softmmu/qtest.o
CC aarch64-softmmu/memory.o
CC aarch64-softmmu/memory_mapping.o
CC x86_64-softmmu/qtest.o
CC aarch64-softmmu/dump.o
CC aarch64-softmmu/migration/ram.o
CC aarch64-softmmu/accel/accel.o
CC x86_64-softmmu/memory.o
CC aarch64-softmmu/accel/stubs/hax-stub.o
CC aarch64-softmmu/accel/stubs/hvf-stub.o
CC x86_64-softmmu/memory_mapping.o
CC aarch64-softmmu/accel/stubs/whpx-stub.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC x86_64-softmmu/dump.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/accel/tcg/tcg-runtime.o
CC x86_64-softmmu/win_dump.o
CC x86_64-softmmu/migration/ram.o
CC aarch64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC x86_64-softmmu/accel/kvm/kvm-all.o
CC x86_64-softmmu/accel/accel.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC x86_64-softmmu/accel/stubs/hax-stub.o
CC x86_64-softmmu/accel/stubs/hvf-stub.o
CC x86_64-softmmu/accel/stubs/whpx-stub.o
CC x86_64-softmmu/accel/tcg/cputlb.o
CC x86_64-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC x86_64-softmmu/accel/tcg/tcg-runtime.o
CC x86_64-softmmu/accel/tcg/tcg-runtime-gvec.o
CC x86_64-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/accel/tcg/translator.o
CC x86_64-softmmu/accel/tcg/cpu-exec-common.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC x86_64-softmmu/accel/tcg/translator.o
CC x86_64-softmmu/accel/tcg/translate-all.o
CC x86_64-softmmu/hw/block/virtio-blk.o
CC x86_64-softmmu/hw/block/vhost-user-blk.o
CC x86_64-softmmu/hw/block/dataplane/virtio-blk.o
CC x86_64-softmmu/hw/char/virtio-serial-bus.o
CC x86_64-softmmu/hw/display/vga.o
CC x86_64-softmmu/hw/display/virtio-gpu.o
CC x86_64-softmmu/hw/display/virtio-gpu-3d.o
CC x86_64-softmmu/hw/display/virtio-gpu-pci.o
CC x86_64-softmmu/hw/display/virtio-vga.o
CC x86_64-softmmu/hw/hyperv/hyperv.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC x86_64-softmmu/hw/hyperv/hyperv_testdev.o
CC aarch64-softmmu/hw/block/vhost-user-blk.o
CC x86_64-softmmu/hw/intc/apic.o
CC x86_64-softmmu/hw/intc/apic_common.o
CC x86_64-softmmu/hw/intc/ioapic.o
CC x86_64-softmmu/hw/isa/lpc_ich9.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC x86_64-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC x86_64-softmmu/hw/misc/pvpanic.o
CC x86_64-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC x86_64-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC x86_64-softmmu/hw/rdma/rdma_utils.o
CC x86_64-softmmu/hw/rdma/rdma_backend.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC x86_64-softmmu/hw/rdma/rdma_rm.o
CC x86_64-softmmu/hw/rdma/vmw/pvrdma_dev_ring.o
CC x86_64-softmmu/hw/rdma/vmw/pvrdma_cmd.o
CC x86_64-softmmu/hw/rdma/vmw/pvrdma_qp_ops.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC x86_64-softmmu/hw/rdma/vmw/pvrdma_main.o
CC x86_64-softmmu/hw/scsi/virtio-scsi.o
CC x86_64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC x86_64-softmmu/hw/scsi/vhost-scsi-common.o
CC x86_64-softmmu/hw/scsi/vhost-scsi.o
CC x86_64-softmmu/hw/scsi/vhost-user-scsi.o
CC x86_64-softmmu/hw/timer/mc146818rtc.o
CC x86_64-softmmu/hw/vfio/common.o
CC x86_64-softmmu/hw/vfio/pci-quirks.o
CC x86_64-softmmu/hw/vfio/pci.o
CC x86_64-softmmu/hw/vfio/display.o
CC x86_64-softmmu/hw/vfio/platform.o
CC x86_64-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC x86_64-softmmu/hw/virtio/virtio.o
CC x86_64-softmmu/hw/virtio/virtio-balloon.o
CC x86_64-softmmu/hw/virtio/virtio-crypto.o
CC x86_64-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC x86_64-softmmu/hw/virtio/vhost.o
CC x86_64-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC x86_64-softmmu/hw/virtio/vhost-user.o
CC x86_64-softmmu/hw/virtio/vhost-vsock.o
CC x86_64-softmmu/hw/xen/xen-host-pci-device.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC aarch64-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/display/dpcd.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC x86_64-softmmu/hw/xen/xen_pt.o
CC x86_64-softmmu/hw/xen/xen_pt_config_init.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC x86_64-softmmu/hw/xen/xen_pt_graphics.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC x86_64-softmmu/hw/xen/xen_pt_msi.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC x86_64-softmmu/hw/xen/xen_pt_load_rom.o
CC x86_64-softmmu/hw/i386/multiboot.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC x86_64-softmmu/hw/i386/pc.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC x86_64-softmmu/hw/i386/pc_piix.o
CC x86_64-softmmu/hw/i386/pc_q35.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC x86_64-softmmu/hw/i386/pc_sysfw.o
CC x86_64-softmmu/hw/i386/x86-iommu.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC x86_64-softmmu/hw/i386/intel_iommu.o
CC x86_64-softmmu/hw/i386/amd_iommu.o
CC x86_64-softmmu/hw/i386/vmport.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC x86_64-softmmu/hw/i386/vmmouse.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC x86_64-softmmu/hw/i386/kvmvapic.o
CC x86_64-softmmu/hw/i386/acpi-build.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC x86_64-softmmu/hw/i386/../xenpv/xen_machine_pv.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC x86_64-softmmu/hw/i386/kvm/clock.o
CC x86_64-softmmu/hw/i386/kvm/apic.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC x86_64-softmmu/hw/i386/kvm/i8259.o
CC x86_64-softmmu/hw/i386/kvm/ioapic.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC x86_64-softmmu/hw/i386/kvm/i8254.o
CC x86_64-softmmu/hw/i386/xen/xen_platform.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC x86_64-softmmu/hw/i386/xen/xen_apic.o
CC x86_64-softmmu/hw/i386/xen/xen_pvdevice.o
CC aarch64-softmmu/hw/misc/cbus.o
CC x86_64-softmmu/hw/i386/xen/xen-hvm.o
CC x86_64-softmmu/hw/i386/xen/xen-mapcache.o
CC x86_64-softmmu/target/i386/helper.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC x86_64-softmmu/target/i386/cpu.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC x86_64-softmmu/target/i386/xsave_helper.o
CC x86_64-softmmu/target/i386/gdbstub.o
CC x86_64-softmmu/target/i386/translate.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC x86_64-softmmu/target/i386/bpt_helper.o
CC x86_64-softmmu/target/i386/cc_helper.o
CC x86_64-softmmu/target/i386/excp_helper.o
CC x86_64-softmmu/target/i386/int_helper.o
CC x86_64-softmmu/target/i386/fpu_helper.o
CC x86_64-softmmu/target/i386/mem_helper.o
CC x86_64-softmmu/target/i386/misc_helper.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC x86_64-softmmu/target/i386/mpx_helper.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC aarch64-softmmu/hw/misc/imx6ul_ccm.o
CC x86_64-softmmu/target/i386/smm_helper.o
CC aarch64-softmmu/hw/misc/imx7_ccm.o
CC x86_64-softmmu/target/i386/seg_helper.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC x86_64-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/hw/misc/imx2_wdt.o
CC aarch64-softmmu/hw/misc/imx7_snvs.o
CC x86_64-softmmu/target/i386/machine.o
CC x86_64-softmmu/target/i386/arch_memory_mapping.o
CC x86_64-softmmu/target/i386/arch_dump.o
CC aarch64-softmmu/hw/misc/imx7_gpr.o
CC x86_64-softmmu/target/i386/monitor.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC x86_64-softmmu/target/i386/kvm.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC x86_64-softmmu/target/i386/hyperv.o
CC x86_64-softmmu/target/i386/sev.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
CC aarch64-softmmu/hw/misc/omap_l4.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/hw/misc/mps2-fpgaio.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC aarch64-softmmu/hw/misc/tz-mpc.o
CC aarch64-softmmu/hw/misc/tz-msc.o
CC aarch64-softmmu/hw/misc/tz-ppc.o
CC aarch64-softmmu/hw/misc/iotkit-secctl.o
CC aarch64-softmmu/hw/misc/iotkit-sysctl.o
CC aarch64-softmmu/hw/misc/iotkit-sysinfo.o
CC x86_64-softmmu/trace/control-target.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC aarch64-softmmu/hw/misc/msf2-sysreg.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/rdma/rdma_utils.o
CC x86_64-softmmu/gdbstub-xml.o
CC aarch64-softmmu/hw/rdma/rdma_backend.o
CC aarch64-softmmu/hw/rdma/rdma_rm.o
CC aarch64-softmmu/hw/rdma/vmw/pvrdma_cmd.o
CC aarch64-softmmu/hw/rdma/vmw/pvrdma_dev_ring.o
CC x86_64-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/rdma/vmw/pvrdma_qp_ops.o
CC aarch64-softmmu/hw/rdma/vmw/pvrdma_main.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC aarch64-softmmu/hw/usb/chipidea.o
CC aarch64-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/vfio/display.o
CC aarch64-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC aarch64-softmmu/hw/arm/boot.o
CC aarch64-softmmu/hw/arm/virt.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC aarch64-softmmu/hw/arm/highbank.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC aarch64-softmmu/hw/arm/netduino2.o
CC aarch64-softmmu/hw/arm/nseries.o
CC aarch64-softmmu/hw/arm/palm.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC aarch64-softmmu/hw/arm/spitz.o
CC aarch64-softmmu/hw/arm/tosa.o
CC aarch64-softmmu/hw/arm/z2.o
CC aarch64-softmmu/hw/arm/realview.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC aarch64-softmmu/hw/arm/collie.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/armv7m.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC aarch64-softmmu/hw/arm/digic.o
CC aarch64-softmmu/hw/arm/omap1.o
CC aarch64-softmmu/hw/arm/omap2.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC aarch64-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC aarch64-softmmu/hw/arm/xlnx-zcu102.o
CC aarch64-softmmu/hw/arm/xlnx-versal.o
CC aarch64-softmmu/hw/arm/xlnx-versal-virt.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC aarch64-softmmu/hw/arm/kzm.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/arm/mps2.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/arm/mps2-tz.o
CC aarch64-softmmu/hw/arm/msf2-som.o
/tmp/qemu-test/src/target/i386/kvm.c: In function 'kvm_arch_on_sigbus_vcpu':
/tmp/qemu-test/src/target/i386/kvm.c:528:13: error: implicit declaration of function 'kvm_hwpoison_page_add' [-Werror=implicit-function-declaration]
kvm_hwpoison_page_add(ram_addr);
^
/tmp/qemu-test/src/target/i386/kvm.c:528:13: error: nested extern declaration of 'kvm_hwpoison_page_add' [-Werror=nested-externs]
/tmp/qemu-test/src/target/i386/kvm.c: In function 'kvm_arch_init':
/tmp/qemu-test/src/target/i386/kvm.c:1525:25: error: 'kvm_unpoison_all' undeclared (first use in this function)
qemu_register_reset(kvm_unpoison_all, NULL);
^
/tmp/qemu-test/src/target/i386/kvm.c:1525:25: note: each undeclared identifier is reported only once for each function it appears in
cc1: all warnings being treated as errors
CC aarch64-softmmu/hw/arm/iotkit.o
CC aarch64-softmmu/hw/arm/fsl-imx7.o
make[1]: *** [target/i386/kvm.o] Error 1
CC aarch64-softmmu/hw/arm/mcimx7d-sabre.o
CC aarch64-softmmu/hw/arm/msf2-soc.o
make: *** [subdir-x86_64-softmmu] Error 2
make: *** Waiting for unfinished jobs....
CC aarch64-softmmu/hw/arm/smmu-common.o
CC aarch64-softmmu/hw/arm/smmuv3.o
CC aarch64-softmmu/hw/arm/fsl-imx6ul.o
CC aarch64-softmmu/hw/arm/mcimx6ul-evk.o
CC aarch64-softmmu/hw/arm/nrf51_soc.o
CC aarch64-softmmu/hw/arm/microbit.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC aarch64-softmmu/target/arm/psci.o
CC aarch64-softmmu/target/arm/machine.o
CC aarch64-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/target/arm/monitor.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/target/arm/translate.o
CC aarch64-softmmu/target/arm/op_helper.o
CC aarch64-softmmu/target/arm/helper.o
CC aarch64-softmmu/target/arm/cpu.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC aarch64-softmmu/target/arm/vec_helper.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC aarch64-softmmu/target/arm/cpu64.o
CC aarch64-softmmu/target/arm/translate-a64.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC aarch64-softmmu/target/arm/crypto_helper.o
CC aarch64-softmmu/target/arm/gdbstub64.o
GEN aarch64-softmmu/target/arm/decode-sve.inc.c
CC aarch64-softmmu/target/arm/arm-powerctl.o
CC aarch64-softmmu/target/arm/sve_helper.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC aarch64-softmmu/gdbstub-xml.o
CC aarch64-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/target/arm/translate-sve.o
LINK aarch64-softmmu/qemu-system-aarch64
Traceback (most recent call last):
File "./tests/docker/docker.py", line 563, in <module>
sys.exit(main())
File "./tests/docker/docker.py", line 560, in main
return args.cmdobj.run(args, argv)
File "./tests/docker/docker.py", line 306, in run
return Docker().run(argv, args.keep, quiet=args.quiet)
File "./tests/docker/docker.py", line 274, in run
quiet=quiet)
File "./tests/docker/docker.py", line 181, in _do_check
return subprocess.check_call(self._command + cmd, **kwargs)
File "/usr/lib64/python2.7/subprocess.py", line 186, in check_call
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '--label', 'com.qemu.instance.uuid=ad3a6d66e3a811e8b2e152540069c830', '-u', '1000', '--security-opt', 'seccomp=unconfined', '--rm', '--net=none', '-e', 'TARGET_LIST=', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=8', '-e', 'DEBUG=', '-e', 'SHOW_ENV=1', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/home/patchew/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-bt40wlf7/src/docker-src.2018-11-08-17.50.11.11855:/var/tmp/qemu:z,ro', 'qemu:centos7', '/var/tmp/qemu/run', 'test-quick']' returned non-zero exit status 2
make[1]: *** [tests/docker/Makefile.include:217: docker-run] Error 1
make[1]: Leaving directory '/var/tmp/patchew-tester-tmp-bt40wlf7/src'
make: *** [tests/docker/Makefile.include:251: docker-run-test-quick@centos7] Error 2
real 1m39.346s
user 0m5.643s
sys 0m4.095s
=== OUTPUT END ===
Test command exited with code: 2
---
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