From: "Moger, Babu" <Babu.Moger@amd.com> To: ssg.sos.staff <ssg.sos.staff@amd.com>, "ehabkost@redhat.com" <ehabkost@redhat.com>, "marcel.apfelbaum@gmail.com" <marcel.apfelbaum@gmail.com>, "mst@redhat.com" <mst@redhat.com>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "rth@twiddle.net" <rth@twiddle.net>, "eblake@redhat.com" <eblake@redhat.com>, "armbru@redhat.com" <armbru@redhat.com>, "imammedo@redhat.com" <imammedo@redhat.com> Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org> Subject: [Qemu-devel] [RFC 2 PATCH 02/16] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs Date: Fri, 6 Sep 2019 19:11:50 +0000 Message-ID: <156779710892.21957.12320825183231112713.stgit@localhost.localdomain> (raw) In-Reply-To: <156779689013.21957.1631551572950676212.stgit@localhost.localdomain> Rename few data structures related to X86 topology. X86CPUTopoIDs will have individual arch ids. Next patch introduces X86CPUTopoInfo which will have all topology information(like cores, threads etc..). Adds node_id and ccx_id. This will be required to support new epyc mode mode. There is no functional change. Signed-off-by: Babu Moger <babu.moger@amd.com> --- hw/i386/pc.c | 60 ++++++++++++++++++++++---------------------- include/hw/i386/topology.h | 42 ++++++++++++++++--------------- 2 files changed, 52 insertions(+), 50 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 549c437050..ada445f8f3 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2379,7 +2379,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, int idx; CPUState *cs; CPUArchId *cpu_slot; - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; X86CPU *cpu = X86_CPU(dev); CPUX86State *env = &cpu->env; MachineState *ms = MACHINE(hotplug_dev); @@ -2432,12 +2432,12 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, return; } - topo.pkg_id = cpu->socket_id; - topo.die_id = cpu->die_id; - topo.core_id = cpu->core_id; - topo.smt_id = cpu->thread_id; + topo_ids.pkg_id = cpu->socket_id; + topo_ids.die_id = cpu->die_id; + topo_ids.core_id = cpu->core_id; + topo_ids.smt_id = cpu->thread_id; cpu->apic_id = apicid_from_topo_ids(pcms->smp_dies, smp_cores, - smp_threads, &topo); + smp_threads, &topo_ids); } cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); @@ -2445,11 +2445,11 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, MachineState *ms = MACHINE(pcms); x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo); + smp_cores, smp_threads, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", - topo.pkg_id, topo.die_id, topo.core_id, topo.smt_id, + topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, cpu->apic_id, ms->possible_cpus->len - 1); return; } @@ -2467,34 +2467,34 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies, - smp_cores, smp_threads, &topo); - if (cpu->socket_id != -1 && cpu->socket_id != topo.pkg_id) { + smp_cores, smp_threads, &topo_ids); + if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id:" - " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo.pkg_id); + " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_ids.pkg_id); return; } - cpu->socket_id = topo.pkg_id; + cpu->socket_id = topo_ids.pkg_id; - if (cpu->die_id != -1 && cpu->die_id != topo.die_id) { + if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { error_setg(errp, "property die-id: %u doesn't match set apic-id:" - " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo.die_id); + " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); return; } - cpu->die_id = topo.die_id; + cpu->die_id = topo_ids.die_id; - if (cpu->core_id != -1 && cpu->core_id != topo.core_id) { + if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { error_setg(errp, "property core-id: %u doesn't match set apic-id:" - " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, topo.core_id); + " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, topo_ids.core_id); return; } - cpu->core_id = topo.core_id; + cpu->core_id = topo_ids.core_id; - if (cpu->thread_id != -1 && cpu->thread_id != topo.smt_id) { + if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { error_setg(errp, "property thread-id: %u doesn't match set apic-id:" - " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, topo.smt_id); + " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, topo_ids.smt_id); return; } - cpu->thread_id = topo.smt_id; + cpu->thread_id = topo_ids.smt_id; if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && !kvm_hv_vpindex_settable()) { @@ -2840,14 +2840,14 @@ pc_cpu_index_to_props(MachineState *ms, unsigned cpu_index) static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx) { - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; PCMachineState *pcms = PC_MACHINE(ms); assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo); - return topo.pkg_id % nb_numa_nodes; + ms->smp.threads, &topo_ids); + return topo_ids.pkg_id % nb_numa_nodes; } static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) @@ -2869,22 +2869,22 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len = max_cpus; for (i = 0; i < ms->possible_cpus->len; i++) { - X86CPUTopoInfo topo; + X86CPUTopoIDs topo_ids; ms->possible_cpus->cpus[i].type = ms->cpu_type; ms->possible_cpus->cpus[i].vcpus_count = 1; ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(pcms, i); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, pcms->smp_dies, ms->smp.cores, - ms->smp.threads, &topo); + ms->smp.threads, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id = true; - ms->possible_cpus->cpus[i].props.socket_id = topo.pkg_id; + ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; ms->possible_cpus->cpus[i].props.has_die_id = true; - ms->possible_cpus->cpus[i].props.die_id = topo.die_id; + ms->possible_cpus->cpus[i].props.die_id = topo_ids.die_id; ms->possible_cpus->cpus[i].props.has_core_id = true; - ms->possible_cpus->cpus[i].props.core_id = topo.core_id; + ms->possible_cpus->cpus[i].props.core_id = topo_ids.core_id; ms->possible_cpus->cpus[i].props.has_thread_id = true; - ms->possible_cpus->cpus[i].props.thread_id = topo.smt_id; + ms->possible_cpus->cpus[i].props.thread_id = topo_ids.smt_id; } return ms->possible_cpus; } diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h index 4ff5b2da6c..0637743cdf 100644 --- a/include/hw/i386/topology.h +++ b/include/hw/i386/topology.h @@ -45,12 +45,14 @@ */ typedef uint32_t apic_id_t; -typedef struct X86CPUTopoInfo { +typedef struct X86CPUTopoIDs { unsigned pkg_id; unsigned die_id; unsigned core_id; unsigned smt_id; -} X86CPUTopoInfo; + unsigned node_id; + unsigned ccx_id; +} X86CPUTopoIDs; /* Return the bit width needed for 'count' IDs */ @@ -122,12 +124,12 @@ static inline unsigned apicid_pkg_offset(unsigned nr_dies, static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies, unsigned nr_cores, unsigned nr_threads, - const X86CPUTopoInfo *topo) + const X86CPUTopoIDs *topo_ids) { - return (topo->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) | - (topo->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threads)) | - (topo->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threads)) | - topo->smt_id; + return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) | + (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threads)) | + (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threads)) | + topo_ids->smt_id; } /* Calculate thread/core/package IDs for a specific topology, @@ -137,12 +139,12 @@ static inline void x86_topo_ids_from_idx(unsigned nr_dies, unsigned nr_cores, unsigned nr_threads, unsigned cpu_index, - X86CPUTopoInfo *topo) + X86CPUTopoIDs *topo_ids) { - topo->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads); - topo->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies; - topo->core_id = cpu_index / nr_threads % nr_cores; - topo->smt_id = cpu_index % nr_threads; + topo_ids->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads); + topo_ids->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies; + topo_ids->core_id = cpu_index / nr_threads % nr_cores; + topo_ids->smt_id = cpu_index % nr_threads; } /* Calculate thread/core/package IDs for a specific topology, @@ -152,17 +154,17 @@ static inline void x86_topo_ids_from_apicid(apic_id_t apicid, unsigned nr_dies, unsigned nr_cores, unsigned nr_threads, - X86CPUTopoInfo *topo) + X86CPUTopoIDs *topo_ids) { - topo->smt_id = apicid & + topo_ids->smt_id = apicid & ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threads)); - topo->core_id = + topo_ids->core_id = (apicid >> apicid_core_offset(nr_dies, nr_cores, nr_threads)) & ~(0xFFFFFFFFUL << apicid_core_width(nr_dies, nr_cores, nr_threads)); - topo->die_id = + topo_ids->die_id = (apicid >> apicid_die_offset(nr_dies, nr_cores, nr_threads)) & ~(0xFFFFFFFFUL << apicid_die_width(nr_dies, nr_cores, nr_threads)); - topo->pkg_id = apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_threads); + topo_ids->pkg_id = apicid >> apicid_pkg_offset(nr_dies, nr_cores, nr_threads); } /* Make APIC ID for the CPU 'cpu_index' @@ -174,9 +176,9 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies, unsigned nr_threads, unsigned cpu_index) { - X86CPUTopoInfo topo; - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo); - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo); + X86CPUTopoIDs topo_ids; + x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_ids); + return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids); } #endif /* HW_I386_TOPOLOGY_H */
next prev parent reply index Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-09-06 19:11 [Qemu-devel] [RFC 2 PATCH 00/16] APIC ID fixes for AMD EPYC CPU models Moger, Babu 2019-09-06 19:11 ` [Qemu-devel] [RFC 2 PATCH 01/16] numa: Split the numa functionality Moger, Babu 2019-10-10 3:25 ` Eduardo Habkost 2019-12-02 20:18 ` Babu Moger 2019-09-06 19:11 ` Moger, Babu [this message] 2019-10-10 3:26 ` [Qemu-devel] [RFC 2 PATCH 02/16] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs Eduardo Habkost 2019-09-06 19:11 ` [Qemu-devel] [RFC 2 PATCH 03/16] hw/i386: Introduce X86CPUTopoInfo to contain topology info Moger, Babu 2019-10-11 2:29 ` Eduardo Habkost 2019-12-02 20:23 ` Babu Moger 2019-10-11 3:54 ` Eduardo Habkost 2019-12-02 20:25 ` Babu Moger 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 04/16] machine: Add SMP Sockets in CpuTopology Moger, Babu 2019-10-11 2:31 ` Eduardo Habkost 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 05/16] hw/i386: Simplify topology Offset/width Calculation Moger, Babu 2019-10-11 2:32 ` Eduardo Habkost 2019-12-02 20:29 ` Babu Moger 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 06/16] hw/core: Add core complex id in X86CPU topology Moger, Babu 2019-09-06 19:20 ` Eric Blake 2019-09-06 19:34 ` Moger, Babu 2019-09-22 12:48 ` Michael S. Tsirkin 2019-09-23 14:38 ` Moger, Babu 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 07/16] hw/386: Add new epyc mode topology decoding functions Moger, Babu 2019-10-11 3:29 ` Eduardo Habkost 2019-12-02 20:38 ` Babu Moger 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 08/16] i386: Cleanup and use the new epyc mode topology functions Moger, Babu 2019-10-11 3:51 ` Eduardo Habkost 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 09/16] hw/i386: Introduce initialize_topo_info function Moger, Babu 2019-10-11 3:54 ` Eduardo Habkost 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 10/16] hw/i386: Introduce apicid_from_cpu_idx in PCMachineState Moger, Babu 2019-09-06 19:12 ` [Qemu-devel] [RFC 2 PATCH 11/16] Introduce-topo_ids_from_apicid-handler Moger, Babu 2019-09-06 19:13 ` [Qemu-devel] [RFC 2 PATCH 12/16] hw/i386: Introduce apic_id_from_topo_ids handler in PCMachineState Moger, Babu 2019-09-06 19:13 ` [Qemu-devel] [RFC 2 PATCH 13/16] machine: Add new epyc property " Moger, Babu 2019-10-11 3:59 ` Eduardo Habkost 2019-10-11 16:23 ` Moger, Babu 2019-10-11 16:59 ` Moger, Babu 2019-10-11 19:03 ` Eduardo Habkost 2019-09-06 19:13 ` [Qemu-devel] [RFC 2 PATCH 14/16] hw/i386: Introduce epyc mode function handlers Moger, Babu 2019-09-06 19:13 ` [Qemu-devel] [RFC 2 PATCH 15/16] i386: Fix pkg_id offset for epyc mode Moger, Babu 2019-10-11 4:03 ` Eduardo Habkost 2019-09-06 19:13 ` [Qemu-devel] [RFC 2 PATCH 16/16] hw/core: Fix up the machine_set_cpu_numa_node for epyc Moger, Babu 2019-10-11 4:10 ` Eduardo Habkost 2019-12-02 20:44 ` Babu Moger 2019-09-20 22:44 ` [RFC 2 PATCH 00/16] APIC ID fixes for AMD EPYC CPU models Moger, Babu
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