From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: arikalo@wavecomp.com
Subject: [PATCH v2 13/20] target/mips: msa: Split helpers for AVER_<S|U>.<B|H|W|D>
Date: Wed, 25 Sep 2019 14:46:05 +0200 [thread overview]
Message-ID: <1569415572-19635-14-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1569415572-19635-1-git-send-email-aleksandar.markovic@rt-rk.com>
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/helper.h | 12 +++-
target/mips/msa_helper.c | 154 ++++++++++++++++++++++++++++++++++++++++++-----
target/mips/translate.c | 38 ++++++++++--
3 files changed, 180 insertions(+), 24 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 455dd25..9d4c9f1 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -832,6 +832,16 @@ DEF_HELPER_4(msa_ave_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_s_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(msa_aver_u_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_u_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_aver_u_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
@@ -890,8 +900,6 @@ DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_u_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_aver_s_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_aver_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index f0dbf24..a4f51c6 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -970,6 +970,144 @@ void helper_msa_ave_u_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt
pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
}
+static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ /* signed shift */
+ return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
+}
+
+void helper_msa_aver_s_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_aver_s_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_aver_s_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_aver_s_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
+static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
+{
+ uint64_t u_arg1 = UNSIGNED(arg1, df);
+ uint64_t u_arg2 = UNSIGNED(arg2, df);
+ /* unsigned shift */
+ return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
+}
+
+void helper_msa_aver_u_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_aver_u_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_aver_u_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_aver_u_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
/*
* Int Compare
@@ -1736,20 +1874,6 @@ static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
}
-static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- /* signed shift */
- return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
-}
-
-static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
-{
- uint64_t u_arg1 = UNSIGNED(arg1, df);
- uint64_t u_arg2 = UNSIGNED(arg2, df);
- /* unsigned shift */
- return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
-}
-
static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
int64_t max_int = DF_MAX_INT(df);
@@ -2057,8 +2181,6 @@ MSA_BINOP_DF(add_a)
MSA_BINOP_DF(adds_a)
MSA_BINOP_DF(adds_s)
MSA_BINOP_DF(adds_u)
-MSA_BINOP_DF(aver_s)
-MSA_BINOP_DF(aver_u)
MSA_BINOP_DF(subs_s)
MSA_BINOP_DF(subs_u)
MSA_BINOP_DF(subsus_u)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2b0abbb..9b186d3 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28498,6 +28498,38 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
+ case OPC_AVER_S_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_aver_s_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_aver_s_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_aver_s_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_aver_s_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
+ case OPC_AVER_U_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_aver_u_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_aver_u_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_aver_u_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_aver_u_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
case OPC_SLL_df:
gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28615,9 +28647,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_MAX_A_df:
gen_helper_msa_max_a_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_AVER_S_df:
- gen_helper_msa_aver_s_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_MOD_S_df:
gen_helper_msa_mod_s_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28627,9 +28656,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_MIN_A_df:
gen_helper_msa_min_a_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_AVER_U_df:
- gen_helper_msa_aver_u_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_MOD_U_df:
gen_helper_msa_mod_u_df(cpu_env, tdf, twd, tws, twt);
break;
--
2.7.4
next prev parent reply other threads:[~2019-09-25 12:54 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 12:45 [PATCH v2 00/20] target/mips: Misc cleanups for September/October 2019 Aleksandar Markovic
2019-09-25 12:45 ` [PATCH v2 01/20] target/mips: Clean up helper.c Aleksandar Markovic
2019-09-25 15:27 ` Philippe Mathieu-Daudé
2019-09-27 4:32 ` Aleksandar Markovic
2019-09-27 8:55 ` Philippe Mathieu-Daudé
2019-09-27 12:03 ` Markus Armbruster
2019-09-27 12:22 ` Peter Maydell
2019-09-27 13:11 ` Aleksandar Markovic
2019-09-28 14:54 ` Markus Armbruster
2019-09-25 12:45 ` [PATCH v2 02/20] target/mips: Clean up internal.h Aleksandar Markovic
2019-09-25 15:07 ` Philippe Mathieu-Daudé
2019-09-25 12:45 ` [PATCH v2 03/20] target/mips: Clean up kvm_mips.h Aleksandar Markovic
2019-09-25 15:08 ` Philippe Mathieu-Daudé
2019-09-25 12:45 ` [PATCH v2 04/20] target/mips: Clean up mips-defs.h Aleksandar Markovic
2019-09-25 15:10 ` Philippe Mathieu-Daudé
2019-09-25 12:45 ` [PATCH v2 05/20] target/mips: Clean up op_helper.c Aleksandar Markovic
2019-09-25 15:24 ` Philippe Mathieu-Daudé
2019-09-25 12:45 ` [PATCH v2 06/20] target/mips: Clean up translate.c Aleksandar Markovic
2019-09-25 12:45 ` [PATCH v2 07/20] target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 08/20] target/mips: msa: Split helpers for PCNT.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 09/20] target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 10/20] target/mips: msa: Unroll loops and demacro <BMNZ|BMZ|BSEL>.V Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 11/20] target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 12/20] target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` Aleksandar Markovic [this message]
2019-09-25 12:46 ` [PATCH v2 14/20] target/mips: msa: Split helpers for CEQ.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 15/20] target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 16/20] target/mips: msa: Split helpers for CLT_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 17/20] target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 18/20] target/mips: msa: Split helpers for MOD_<S|U>.<B|H|W|D> Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 19/20] target/mips: msa: Simplify and move helper for MOVE.V Aleksandar Markovic
2019-09-25 12:46 ` [PATCH v2 20/20] target/mips: msa: Move helpers for <AND|NOR|OR|XOR>.V Aleksandar Markovic
2019-09-25 14:09 ` [EXTERNAL][PATCH v2 00/20] target/mips: Misc cleanups for September/October 2019 Aleksandar Rikalo
2019-09-25 14:13 ` Aleksandar Rikalo
2019-10-01 15:26 ` [PATCH " Aleksandar Markovic
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