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Wed, 4 Dec 2019 00:38:34 +0000 Subject: [PATCH v3 14/18] hw/i386: Introduce topo_ids_from_apicid handler PCMachineState From: Babu Moger To: ehabkost@redhat.com, marcel.apfelbaum@gmail.com, mst@redhat.com, pbonzini@redhat.com, rth@twiddle.net, eblake@redhat.com, armbru@redhat.com, imammedo@redhat.com Date: Tue, 03 Dec 2019 18:38:32 -0600 Message-ID: <157541991228.46157.16916453001605357002.stgit@naples-babu.amd.com> In-Reply-To: <157541968844.46157.17994918142533791313.stgit@naples-babu.amd.com> References: <157541968844.46157.17994918142533791313.stgit@naples-babu.amd.com> User-Agent: StGit/unknown-version Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SN6PR05CA0003.namprd05.prod.outlook.com (2603:10b6:805:de::16) To DM5PR12MB2471.namprd12.prod.outlook.com (2603:10b6:4:b5::10) MIME-Version: 1.0 X-Originating-IP: [165.204.78.2] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: a588a01c-7f56-44f3-6096-08d778524b24 X-MS-TrafficTypeDiagnostic: DM5PR12MB1369:|DM5PR12MB1369: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3968; 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Initialize with correct handler based on mode selected. x86_apicid_from_cpu_idx will be the default handler. Signed-off-by: Babu Moger --- hw/i386/pc.c | 13 +++++++------ include/hw/i386/pc.h | 2 ++ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 52aea4a652..b0d58515dd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2312,7 +2312,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, if (!cpu_slot) { MachineState *ms = MACHINE(pcms); - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); error_setg(errp, "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" " APIC ID %" PRIu32 ", valid index range 0:%d", @@ -2333,7 +2333,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() * once -smp refactoring is complete and there will be CPU private * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); + pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { error_setg(errp, "property socket-id: %u doesn't match set apic-id:" " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_ids.pkg_id); @@ -2681,6 +2681,7 @@ static void pc_machine_initfn(Object *obj) /* Initialize the apic id related handlers */ pcms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx; + pcms->topo_ids_from_apicid = x86_topo_ids_from_apicid; pc_system_flash_create(pcms); } @@ -2730,8 +2731,8 @@ static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx) initialize_topo_info(&topo_info, pcms, ms); assert(idx < ms->possible_cpus->len); - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, - &topo_info, &topo_ids); + pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, + &topo_info, &topo_ids); return topo_ids.pkg_id % ms->numa_state->num_nodes; } @@ -2763,8 +2764,8 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) ms->possible_cpus->cpus[i].type = ms->cpu_type; ms->possible_cpus->cpus[i].vcpus_count = 1; ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(pcms, i); - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, - &topo_info, &topo_ids); + pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, + &topo_info, &topo_ids); ms->possible_cpus->cpus[i].props.has_socket_id = true; ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; if (pcms->smp_dies > 1) { diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 56aa0e45b5..ffc5c78164 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -71,6 +71,8 @@ struct PCMachineState { /* Apic id specific handlers */ uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info, unsigned cpu_index); + void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info, + X86CPUTopoIDs *topo_ids); /* Address space used by IOAPIC device. All IOAPIC interrupts * will be translated to MSI messages in the address space. */