From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: thuth@redhat.com, elmarco@redhat.com
Subject: [PATCH v2 03/18] tcg: move qemu_tcg_configure to accel/tcg/tcg-all.c
Date: Mon, 9 Dec 2019 16:01:30 +0100 [thread overview]
Message-ID: <1575903705-12925-4-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1575903705-12925-1-git-send-email-pbonzini@redhat.com>
Move everything related to mttcg_enabled in accel/tcg/tcg-all.c,
which will make even more sense when "thread" becomes a QOM property.
For now, initializing mttcg_enabled in the instance_init function
prepares for the next patch, which will only invoke qemu_tcg_configure
when the command line includes a -accel option.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
accel/tcg/tcg-all.c | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++++
cpus.c | 72 ---------------------------------------------
2 files changed, 85 insertions(+), 72 deletions(-)
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index c59d5b0..78a0ab5 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -30,6 +30,11 @@
#include "cpu.h"
#include "sysemu/cpus.h"
#include "qemu/main-loop.h"
+#include "tcg/tcg.h"
+#include "include/qapi/error.h"
+#include "include/qemu/error-report.h"
+#include "include/hw/boards.h"
+#include "qemu/option.h"
unsigned long tcg_tb_size;
@@ -58,6 +63,55 @@ static void tcg_handle_interrupt(CPUState *cpu, int mask)
}
}
+/*
+ * We default to false if we know other options have been enabled
+ * which are currently incompatible with MTTCG. Otherwise when each
+ * guest (target) has been updated to support:
+ * - atomic instructions
+ * - memory ordering primitives (barriers)
+ * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
+ *
+ * Once a guest architecture has been converted to the new primitives
+ * there are two remaining limitations to check.
+ *
+ * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
+ * - The host must have a stronger memory order than the guest
+ *
+ * It may be possible in future to support strong guests on weak hosts
+ * but that will require tagging all load/stores in a guest with their
+ * implicit memory order requirements which would likely slow things
+ * down a lot.
+ */
+
+static bool check_tcg_memory_orders_compatible(void)
+{
+#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
+ return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
+#else
+ return false;
+#endif
+}
+
+static bool default_mttcg_enabled(void)
+{
+ if (use_icount || TCG_OVERSIZED_GUEST) {
+ return false;
+ } else {
+#ifdef TARGET_SUPPORTS_MTTCG
+ return check_tcg_memory_orders_compatible();
+#else
+ return false;
+#endif
+ }
+}
+
+static void tcg_accel_instance_init(Object *obj)
+{
+ TCGState *s = TCG_STATE(obj);
+
+ mttcg_enabled = default_mttcg_enabled();
+}
+
static int tcg_init(MachineState *ms)
{
tcg_exec_init(tcg_tb_size * 1024 * 1024);
@@ -65,6 +119,36 @@ static int tcg_init(MachineState *ms)
return 0;
}
+void qemu_tcg_configure(QemuOpts *opts, Error **errp)
+{
+ const char *t = qemu_opt_get(opts, "thread");
+ if (!t) {
+ return;
+ }
+ if (strcmp(t, "multi") == 0) {
+ if (TCG_OVERSIZED_GUEST) {
+ error_setg(errp, "No MTTCG when guest word size > hosts");
+ } else if (use_icount) {
+ error_setg(errp, "No MTTCG when icount is enabled");
+ } else {
+#ifndef TARGET_SUPPORTS_MTTCG
+ warn_report("Guest not yet converted to MTTCG - "
+ "you may get unexpected results");
+#endif
+ if (!check_tcg_memory_orders_compatible()) {
+ warn_report("Guest expects a stronger memory ordering "
+ "than the host provides");
+ error_printf("This may cause strange/hard to debug errors\n");
+ }
+ mttcg_enabled = true;
+ }
+ } else if (strcmp(t, "single") == 0) {
+ mttcg_enabled = false;
+ } else {
+ error_setg(errp, "Invalid 'thread' setting %s", t);
+ }
+}
+
static void tcg_accel_class_init(ObjectClass *oc, void *data)
{
AccelClass *ac = ACCEL_CLASS(oc);
@@ -78,6 +162,7 @@ static void tcg_accel_class_init(ObjectClass *oc, void *data)
static const TypeInfo tcg_accel_type = {
.name = TYPE_TCG_ACCEL,
.parent = TYPE_ACCEL,
+ .instance_init = tcg_accel_instance_init,
.class_init = tcg_accel_class_init,
};
diff --git a/cpus.c b/cpus.c
index 63bda15..b472378 100644
--- a/cpus.c
+++ b/cpus.c
@@ -166,78 +166,6 @@ typedef struct TimersState {
static TimersState timers_state;
bool mttcg_enabled;
-/*
- * We default to false if we know other options have been enabled
- * which are currently incompatible with MTTCG. Otherwise when each
- * guest (target) has been updated to support:
- * - atomic instructions
- * - memory ordering primitives (barriers)
- * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
- *
- * Once a guest architecture has been converted to the new primitives
- * there are two remaining limitations to check.
- *
- * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
- * - The host must have a stronger memory order than the guest
- *
- * It may be possible in future to support strong guests on weak hosts
- * but that will require tagging all load/stores in a guest with their
- * implicit memory order requirements which would likely slow things
- * down a lot.
- */
-
-static bool check_tcg_memory_orders_compatible(void)
-{
-#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
- return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
-#else
- return false;
-#endif
-}
-
-static bool default_mttcg_enabled(void)
-{
- if (use_icount || TCG_OVERSIZED_GUEST) {
- return false;
- } else {
-#ifdef TARGET_SUPPORTS_MTTCG
- return check_tcg_memory_orders_compatible();
-#else
- return false;
-#endif
- }
-}
-
-void qemu_tcg_configure(QemuOpts *opts, Error **errp)
-{
- const char *t = qemu_opt_get(opts, "thread");
- if (t) {
- if (strcmp(t, "multi") == 0) {
- if (TCG_OVERSIZED_GUEST) {
- error_setg(errp, "No MTTCG when guest word size > hosts");
- } else if (use_icount) {
- error_setg(errp, "No MTTCG when icount is enabled");
- } else {
-#ifndef TARGET_SUPPORTS_MTTCG
- warn_report("Guest not yet converted to MTTCG - "
- "you may get unexpected results");
-#endif
- if (!check_tcg_memory_orders_compatible()) {
- warn_report("Guest expects a stronger memory ordering "
- "than the host provides");
- error_printf("This may cause strange/hard to debug errors\n");
- }
- mttcg_enabled = true;
- }
- } else if (strcmp(t, "single") == 0) {
- mttcg_enabled = false;
- } else {
- error_setg(errp, "Invalid 'thread' setting %s", t);
- }
- } else {
- mttcg_enabled = default_mttcg_enabled();
- }
-}
/* The current number of executed instructions is based on what we
* originally budgeted minus the current state of the decrementing
--
1.8.3.1
next prev parent reply other threads:[~2019-12-09 15:08 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-09 15:01 [PATCH v2 00/18] Complete the implementation of -accel Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 01/18] memory: do not look at current_machine->accel Paolo Bonzini
2019-12-12 4:39 ` Richard Henderson
2019-12-09 15:01 ` [PATCH v2 02/18] vl: move icount configuration earlier Paolo Bonzini
2019-12-12 4:41 ` Richard Henderson
2019-12-09 15:01 ` Paolo Bonzini [this message]
2019-12-10 11:55 ` [PATCH v2 03/18] tcg: move qemu_tcg_configure to accel/tcg/tcg-all.c Philippe Mathieu-Daudé
2019-12-10 12:05 ` Marc-André Lureau
2019-12-12 4:47 ` Richard Henderson
2019-12-09 15:01 ` [PATCH v2 04/18] vl: extract accelerator option processing to a separate function Paolo Bonzini
2019-12-10 11:56 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 05/18] vl: merge -accel processing into configure_accelerators Paolo Bonzini
2019-12-10 11:57 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 06/18] accel: compile accel/accel.c just once Paolo Bonzini
2019-12-10 11:58 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 07/18] vl: introduce object_parse_property_opt Paolo Bonzini
2019-12-10 11:53 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 08/18] vl: configure accelerators from -accel options Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 09/18] vl: warn for unavailable accelerators, clarify messages Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 10/18] qom: introduce object_register_sugar_prop Paolo Bonzini
2019-12-10 12:36 ` Marc-André Lureau
2019-12-09 15:01 ` [PATCH v2 11/18] qom: add object_new_with_class Paolo Bonzini
2019-12-09 15:31 ` Philippe Mathieu-Daudé
2019-12-09 17:14 ` Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 12/18] accel: pass object to accel_init_machine Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 13/18] tcg: convert "-accel threads" to a QOM property Paolo Bonzini
2019-12-09 15:28 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 14/18] tcg: add "-accel tcg, tb-size" and deprecate "-tb-size" Paolo Bonzini
2019-12-09 15:52 ` Philippe Mathieu-Daudé
2019-12-09 17:18 ` Paolo Bonzini
2019-12-10 12:53 ` Marc-André Lureau
2019-12-09 15:01 ` [PATCH v2 15/18] xen: convert "-machine igd-passthru" to an accelerator property Paolo Bonzini
2019-12-09 15:48 ` Philippe Mathieu-Daudé
2019-12-10 12:56 ` Marc-André Lureau
2019-12-10 17:44 ` Paolo Bonzini
2019-12-09 15:01 ` [PATCH v2 16/18] kvm: convert "-machine kvm_shadow_mem" " Paolo Bonzini
2019-12-10 12:01 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 17/18] kvm: introduce kvm_kernel_irqchip_* functions Paolo Bonzini
2019-12-10 12:02 ` Philippe Mathieu-Daudé
2019-12-09 15:01 ` [PATCH v2 18/18] kvm: convert "-machine kernel_irqchip" to an accelerator property Paolo Bonzini
2019-12-10 12:05 ` Philippe Mathieu-Daudé
2019-12-09 22:42 ` [PATCH v2 00/18] Complete the implementation of -accel no-reply
2019-12-09 22:58 ` no-reply
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