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From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: riku.voipio@iki.fi, richard.henderson@linaro.org,
	laurent@vivier.eu, Taylor Simpson <tsimpson@quicinc.com>,
	philmd@redhat.com, aleksandar.m.mail@gmail.com
Subject: [RFC PATCH v2 14/67] Hexagon instruction/packet decode
Date: Fri, 28 Feb 2020 10:43:10 -0600	[thread overview]
Message-ID: <1582908244-304-15-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1582908244-304-1-git-send-email-tsimpson@quicinc.com>

Take the words from instruction memory and build a packet_t for TCG code
generation

The following operations are performed
    Convert the .new encoded offset to the register number of the producer
    Reorder the instructions in the packet so .new producer is before consumer
    Apply constant extenders
    Separate subinsn's into two instructions
    Break compare-jumps into two instructions
    Create instructions for :endloop

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/decode.h     |  39 +++
 target/hexagon/decode.c     | 769 ++++++++++++++++++++++++++++++++++++++++++++
 target/hexagon/q6v_decode.c | 402 +++++++++++++++++++++++
 3 files changed, 1210 insertions(+)
 create mode 100644 target/hexagon/decode.h
 create mode 100644 target/hexagon/decode.c
 create mode 100644 target/hexagon/q6v_decode.c

diff --git a/target/hexagon/decode.h b/target/hexagon/decode.h
new file mode 100644
index 0000000..7f63b1c
--- /dev/null
+++ b/target/hexagon/decode.h
@@ -0,0 +1,39 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_DECODE_H
+#define HEXAGON_DECODE_H
+
+#include "cpu.h"
+#include "opcodes.h"
+#include "hex_arch_types.h"
+#include "insn.h"
+
+extern void decode_init(void);
+
+static inline int is_packet_end(uint32_t word)
+{
+    uint32_t bits = (word >> 14) & 0x3;
+    return ((bits == 0x3) || (bits == 0x0));
+}
+
+extern void decode_send_insn_to(packet_t *packet, int start, int newloc);
+
+extern packet_t *decode_this(int max_words, size4u_t *words,
+                             packet_t *decode_pkt);
+
+#endif
diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
new file mode 100644
index 0000000..2201c23
--- /dev/null
+++ b/target/hexagon/decode.c
@@ -0,0 +1,769 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/log.h"
+#include "iclass.h"
+#include "opcodes.h"
+#include "genptr.h"
+#include "decode.h"
+#include "insn.h"
+#include "macros.h"
+#include "printinsn.h"
+
+enum {
+    EXT_IDX_noext = 0,
+    EXT_IDX_noext_AFTER = 4,
+    EXT_IDX_mmvec = 4,
+    EXT_IDX_mmvec_AFTER = 8,
+    XX_LAST_EXT_IDX
+};
+
+#define DEF_REGMAP(NAME, ELEMENTS, ...) \
+    static const unsigned int DECODE_REGISTER_##NAME[ELEMENTS] = \
+    { __VA_ARGS__ };
+#include "regmap.h"
+
+#define DECODE_MAPPED_REG(REGNO, NAME) \
+    insn->regno[REGNO] = DECODE_REGISTER_##NAME[insn->regno[REGNO]];
+
+typedef struct {
+    struct _dectree_table_struct *table_link;
+    struct _dectree_table_struct *table_link_b;
+    opcode_t opcode;
+    enum {
+        DECTREE_ENTRY_INVALID,
+        DECTREE_TABLE_LINK,
+        DECTREE_SUBINSNS,
+        DECTREE_EXTSPACE,
+        DECTREE_TERMINAL
+    } type;
+} dectree_entry_t;
+
+typedef struct _dectree_table_struct {
+    unsigned int (*lookup_function)(int startbit, int width, size4u_t opcode);
+    unsigned int size;
+    unsigned int startbit;
+    unsigned int width;
+    dectree_entry_t table[];
+} dectree_table_t;
+
+#define DECODE_NEW_TABLE(TAG, SIZE, WHATNOT) \
+    static struct _dectree_table_struct dectree_table_##TAG;
+#define TABLE_LINK(TABLE)                     /* NOTHING */
+#define TERMINAL(TAG, ENC)                    /* NOTHING */
+#define SUBINSNS(TAG, CLASSA, CLASSB, ENC)    /* NOTHING */
+#define EXTSPACE(TAG, ENC)                    /* NOTHING */
+#define INVALID()                             /* NOTHING */
+#define DECODE_END_TABLE(...)                 /* NOTHING */
+#define DECODE_MATCH_INFO(...)                /* NOTHING */
+#define DECODE_LEGACY_MATCH_INFO(...)         /* NOTHING */
+#define DECODE_OPINFO(...)                    /* NOTHING */
+
+#include "dectree_generated.h"
+
+#undef DECODE_OPINFO
+#undef DECODE_MATCH_INFO
+#undef DECODE_LEGACY_MATCH_INFO
+#undef DECODE_END_TABLE
+#undef INVALID
+#undef TERMINAL
+#undef SUBINSNS
+#undef EXTSPACE
+#undef TABLE_LINK
+#undef DECODE_NEW_TABLE
+#undef DECODE_SEPARATOR_BITS
+
+#define DECODE_SEPARATOR_BITS(START, WIDTH) NULL, START, WIDTH
+#define DECODE_NEW_TABLE_HELPER(TAG, SIZE, FN, START, WIDTH) \
+    static dectree_table_t dectree_table_##TAG = { \
+        .size = SIZE, \
+        .lookup_function = FN, \
+        .startbit = START, \
+        .width = WIDTH, \
+        .table = {
+#define DECODE_NEW_TABLE(TAG, SIZE, WHATNOT) \
+    DECODE_NEW_TABLE_HELPER(TAG, SIZE, WHATNOT)
+
+#define TABLE_LINK(TABLE) \
+    { .type = DECTREE_TABLE_LINK, .table_link = &dectree_table_##TABLE },
+#define TERMINAL(TAG, ENC) \
+    { .type = DECTREE_TERMINAL, .opcode = TAG  },
+#define SUBINSNS(TAG, CLASSA, CLASSB, ENC) \
+    { \
+        .type = DECTREE_SUBINSNS, \
+        .table_link = &dectree_table_DECODE_SUBINSN_##CLASSA, \
+        .table_link_b = &dectree_table_DECODE_SUBINSN_##CLASSB \
+    },
+#define EXTSPACE(TAG, ENC) { .type = DECTREE_EXTSPACE },
+#define INVALID() { .type = DECTREE_ENTRY_INVALID, .opcode = XX_LAST_OPCODE },
+
+#define DECODE_END_TABLE(...) } };
+
+#define DECODE_MATCH_INFO(...)                /* NOTHING */
+#define DECODE_LEGACY_MATCH_INFO(...)         /* NOTHING */
+#define DECODE_OPINFO(...)                    /* NOTHING */
+
+#include "dectree_generated.h"
+
+#undef DECODE_OPINFO
+#undef DECODE_MATCH_INFO
+#undef DECODE_LEGACY_MATCH_INFO
+#undef DECODE_END_TABLE
+#undef INVALID
+#undef TERMINAL
+#undef SUBINSNS
+#undef EXTSPACE
+#undef TABLE_LINK
+#undef DECODE_NEW_TABLE
+#undef DECODE_NEW_TABLE_HELPER
+#undef DECODE_SEPARATOR_BITS
+
+static dectree_table_t dectree_table_DECODE_EXT_EXT_noext = {
+    .size = 1, .lookup_function = NULL, .startbit = 0, .width = 0,
+    .table = {
+        { .type = DECTREE_ENTRY_INVALID, .opcode = XX_LAST_OPCODE },
+    }
+};
+
+static dectree_table_t *ext_trees[XX_LAST_EXT_IDX];
+
+static void decode_ext_init(void)
+{
+    int i;
+    for (i = EXT_IDX_noext; i < EXT_IDX_noext_AFTER; i++) {
+        ext_trees[i] = &dectree_table_DECODE_EXT_EXT_noext;
+    }
+}
+
+typedef struct {
+    size4u_t mask;
+    size4u_t match;
+} decode_itable_entry_t;
+
+#define DECODE_NEW_TABLE(TAG, SIZE, WHATNOT)  /* NOTHING */
+#define TABLE_LINK(TABLE)                     /* NOTHING */
+#define TERMINAL(TAG, ENC)                    /* NOTHING */
+#define SUBINSNS(TAG, CLASSA, CLASSB, ENC)    /* NOTHING */
+#define EXTSPACE(TAG, ENC)                    /* NOTHING */
+#define INVALID()                             /* NOTHING */
+#define DECODE_END_TABLE(...)                 /* NOTHING */
+#define DECODE_OPINFO(...)                    /* NOTHING */
+
+#define DECODE_MATCH_INFO_NORMAL(TAG, MASK, MATCH) \
+    [TAG] = { \
+        .mask = MASK, \
+        .match = MATCH, \
+    },
+
+#define DECODE_MATCH_INFO_NULL(TAG, MASK, MATCH) \
+    [TAG] = { .match = ~0 },
+
+#define DECODE_MATCH_INFO(...) DECODE_MATCH_INFO_NORMAL(__VA_ARGS__)
+#define DECODE_LEGACY_MATCH_INFO(...) /* NOTHING */
+
+static const decode_itable_entry_t decode_itable[XX_LAST_OPCODE] = {
+#include "dectree_generated.h"
+};
+
+#undef DECODE_MATCH_INFO
+#define DECODE_MATCH_INFO(...) DECODE_MATCH_INFO_NULL(__VA_ARGS__)
+
+#undef DECODE_LEGACY_MATCH_INFO
+#define DECODE_LEGACY_MATCH_INFO(...) DECODE_MATCH_INFO_NORMAL(__VA_ARGS__)
+
+static const decode_itable_entry_t decode_legacy_itable[XX_LAST_OPCODE] = {
+#include "dectree_generated.h"
+};
+
+#undef DECODE_OPINFO
+#undef DECODE_MATCH_INFO
+#undef DECODE_LEGACY_MATCH_INFO
+#undef DECODE_END_TABLE
+#undef INVALID
+#undef TERMINAL
+#undef SUBINSNS
+#undef EXTSPACE
+#undef TABLE_LINK
+#undef DECODE_NEW_TABLE
+#undef DECODE_SEPARATOR_BITS
+
+void decode_init(void)
+{
+    decode_ext_init();
+}
+
+void decode_send_insn_to(packet_t *packet, int start, int newloc)
+{
+    insn_t tmpinsn;
+    int direction;
+    int i;
+    if (start == newloc) {
+        return;
+    }
+    if (start < newloc) {
+        /* Move towards end */
+        direction = 1;
+    } else {
+        /* move towards beginning */
+        direction = -1;
+    }
+    for (i = start; i != newloc; i += direction) {
+        tmpinsn = packet->insn[i];
+        packet->insn[i] = packet->insn[i + direction];
+        packet->insn[i + direction] = tmpinsn;
+    }
+}
+
+/* Fill newvalue registers with the correct regno */
+static int
+decode_fill_newvalue_regno(packet_t *packet)
+{
+    int i, def_regnum, use_regidx, def_idx;
+    size2u_t def_opcode, use_opcode;
+    char *dststr;
+
+    for (i = 1; i < packet->num_insns; i++) {
+        if (GET_ATTRIB(packet->insn[i].opcode, A_DOTNEWVALUE) &&
+            !GET_ATTRIB(packet->insn[i].opcode, A_EXTENSION)) {
+            use_opcode = packet->insn[i].opcode;
+
+            /* It's a store, so we're adjusting the Nt field */
+            if (GET_ATTRIB(use_opcode, A_STORE)) {
+                use_regidx = strchr(opcode_reginfo[use_opcode], 't') -
+                    opcode_reginfo[use_opcode];
+            } else {    /* It's a Jump, so we're adjusting the Ns field */
+                use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
+                    opcode_reginfo[use_opcode];
+            }
+
+            /*
+             * What's encoded at the N-field is the offset to who's producing
+             * the value.  Shift off the LSB which indicates odd/even register.
+             */
+            def_idx = i - ((packet->insn[i].regno[use_regidx]) >> 1);
+
+            /*
+             * Check for a badly encoded N-field which points to an instruction
+             * out-of-range
+             */
+            if ((def_idx < 0) || (def_idx > (packet->num_insns - 1))) {
+                g_assert_not_reached();
+                return 1;
+            }
+
+            /* previous insn is the producer */
+            def_opcode = packet->insn[def_idx].opcode;
+            dststr = strstr(opcode_wregs[def_opcode], "Rd");
+            if (dststr) {
+                dststr = strchr(opcode_reginfo[def_opcode], 'd');
+            } else {
+                dststr = strstr(opcode_wregs[def_opcode], "Rx");
+                if (dststr) {
+                    dststr = strchr(opcode_reginfo[def_opcode], 'x');
+                } else {
+                    dststr = strstr(opcode_wregs[def_opcode], "Re");
+                    if (dststr) {
+                        dststr = strchr(opcode_reginfo[def_opcode], 'e');
+                    } else {
+                        dststr = strstr(opcode_wregs[def_opcode], "Ry");
+                        if (dststr) {
+                            dststr = strchr(opcode_reginfo[def_opcode], 'y');
+                        } else {
+                            g_assert_not_reached();
+                            return 1;
+                        }
+                    }
+                }
+            }
+            g_assert(dststr != NULL);
+            def_regnum =
+                packet->insn[def_idx].regno[dststr -
+                    opcode_reginfo[def_opcode]];
+
+            /* Now patch up the consumer with the register number */
+            packet->insn[i].regno[use_regidx] = def_regnum;
+            /*
+             * We need to remember who produces this value to later
+             * check if it was dynamically cancelled
+             */
+            packet->insn[i].new_value_producer_slot =
+                packet->insn[def_idx].slot;
+        }
+    }
+    return 0;
+}
+
+/* Split CJ into a compare and a jump */
+static int decode_split_cmpjump(packet_t *pkt)
+{
+    int last, i;
+    int numinsns = pkt->num_insns;
+
+    /*
+     * First, split all compare-jumps.
+     * The compare is sent to the end as a new instruction.
+     * Do it this way so we don't reorder dual jumps. Those need to stay in
+     * original order.
+     */
+    for (i = 0; i < numinsns; i++) {
+        /* It's a cmp-jump */
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_NEWCMPJUMP)) {
+            last = pkt->num_insns;
+            pkt->insn[last] = pkt->insn[i];    /* copy the instruction */
+            pkt->insn[last].part1 = 1;    /* last instruction does the CMP */
+            pkt->insn[i].part1 = 0;    /* existing instruction does the JUMP */
+        pkt->num_insns++;
+        }
+    }
+
+    /* Now re-shuffle all the compares back to the beginning */
+    for (i = 0; i < pkt->num_insns; i++) {
+        if (pkt->insn[i].part1) {
+            decode_send_insn_to(pkt, i, 0);
+        }
+    }
+    return 0;
+}
+
+static inline int decode_opcode_can_jump(int opcode)
+{
+    if ((GET_ATTRIB(opcode, A_JUMP)) ||
+        (GET_ATTRIB(opcode, A_CALL)) ||
+        (opcode == J2_trap0) ||
+        (opcode == J2_trap1) ||
+        (opcode == J2_rte) ||
+        (opcode == J2_pause)) {
+        /* Exception to A_JUMP attribute */
+        if (opcode == J4_hintjumpr) {
+            return 0;
+        }
+        return 1;
+    }
+
+    return 0;
+}
+
+static inline int decode_opcode_ends_loop(int opcode)
+{
+    return GET_ATTRIB(opcode, A_HWLOOP0_END) ||
+           GET_ATTRIB(opcode, A_HWLOOP1_END);
+}
+
+/* Set the is_* fields in each instruction */
+static int decode_set_insn_attr_fields(packet_t *pkt)
+{
+    int i;
+    int numinsns = pkt->num_insns;
+    size2u_t opcode;
+    int loads = 0;
+    int stores = 0;
+    int canjump;
+    int total_slots_valid = 0;
+
+    pkt->num_rops = 0;
+    pkt->pkt_has_cof = 0;
+    pkt->pkt_has_call = 0;
+    pkt->pkt_has_jumpr = 0;
+    pkt->pkt_has_cjump = 0;
+    pkt->pkt_has_cjump_dotnew = 0;
+    pkt->pkt_has_cjump_dotold = 0;
+    pkt->pkt_has_cjump_newval = 0;
+    pkt->pkt_has_endloop = 0;
+    pkt->pkt_has_endloop0 = 0;
+    pkt->pkt_has_endloop01 = 0;
+    pkt->pkt_has_endloop1 = 0;
+    pkt->pkt_has_cacheop = 0;
+    pkt->memop_or_nvstore = 0;
+    pkt->pkt_has_dczeroa = 0;
+    pkt->pkt_has_dealloc_return = 0;
+
+    for (i = 0; i < numinsns; i++) {
+        opcode = pkt->insn[i].opcode;
+        if (pkt->insn[i].part1) {
+            continue;    /* Skip compare of cmp-jumps */
+        }
+
+        if (GET_ATTRIB(opcode, A_ROPS_3)) {
+            pkt->num_rops += 3;
+        } else if (GET_ATTRIB(opcode, A_ROPS_2)) {
+            pkt->num_rops += 2;
+        } else {
+            pkt->num_rops++;
+        }
+        if (pkt->insn[i].extension_valid) {
+            pkt->num_rops += 2;
+        }
+
+        if (GET_ATTRIB(opcode, A_MEMOP) ||
+            GET_ATTRIB(opcode, A_NVSTORE)) {
+            pkt->memop_or_nvstore = 1;
+        }
+
+        if (GET_ATTRIB(opcode, A_CACHEOP)) {
+            pkt->pkt_has_cacheop = 1;
+            if (GET_ATTRIB(opcode, A_DCZEROA)) {
+                pkt->pkt_has_dczeroa = 1;
+            }
+            if (GET_ATTRIB(opcode, A_ICTAGOP)) {
+                pkt->pkt_has_ictagop = 1;
+            }
+            if (GET_ATTRIB(opcode, A_ICFLUSHOP)) {
+                pkt->pkt_has_icflushop = 1;
+            }
+            if (GET_ATTRIB(opcode, A_DCTAGOP)) {
+                pkt->pkt_has_dctagop = 1;
+            }
+            if (GET_ATTRIB(opcode, A_DCFLUSHOP)) {
+                pkt->pkt_has_dcflushop = 1;
+            }
+            if (GET_ATTRIB(opcode, A_L2TAGOP)) {
+                pkt->pkt_has_l2tagop = 1;
+            }
+            if (GET_ATTRIB(opcode, A_L2FLUSHOP)) {
+                pkt->pkt_has_l2flushop = 1;
+            }
+        }
+
+        if (GET_ATTRIB(opcode, A_DEALLOCRET)) {
+            pkt->pkt_has_dealloc_return = 1;
+        }
+
+        if (GET_ATTRIB(opcode, A_STORE)) {
+            pkt->insn[i].is_store = 1;
+
+            if (pkt->insn[i].slot == 0) {
+                pkt->pkt_has_store_s0 = 1;
+            } else {
+                pkt->pkt_has_store_s1 = 1;
+            }
+        }
+        if (GET_ATTRIB(opcode, A_DCFETCH)) {
+            pkt->insn[i].is_dcfetch = 1;
+        }
+        if (GET_ATTRIB(opcode, A_LOAD)) {
+            pkt->insn[i].is_load = 1;
+
+            if (pkt->insn[i].slot == 0) {
+                pkt->pkt_has_load_s0 = 1;
+            } else {
+                pkt->pkt_has_load_s1 = 1;
+            }
+        }
+        if (GET_ATTRIB(opcode, A_MEMOP)) {
+            pkt->insn[i].is_memop = 1;
+        }
+        if (GET_ATTRIB(opcode, A_DEALLOCRET) ||
+            GET_ATTRIB(opcode, A_DEALLOCFRAME)) {
+            pkt->insn[i].is_dealloc = 1;
+        }
+        if (GET_ATTRIB(opcode, A_DCFLUSHOP) ||
+            GET_ATTRIB(opcode, A_DCTAGOP)) {
+            pkt->insn[i].is_dcop = 1;
+        }
+
+        pkt->pkt_has_call |= GET_ATTRIB(opcode, A_CALL);
+        pkt->pkt_has_jumpr |= GET_ATTRIB(opcode, A_INDIRECT) &&
+                              !GET_ATTRIB(opcode, A_HINTJR);
+        pkt->pkt_has_cjump |= GET_ATTRIB(opcode, A_CJUMP);
+        pkt->pkt_has_cjump_dotnew |= GET_ATTRIB(opcode, A_DOTNEW) &&
+                                     GET_ATTRIB(opcode, A_CJUMP);
+        pkt->pkt_has_cjump_dotold |= GET_ATTRIB(opcode, A_DOTOLD) &&
+                                     GET_ATTRIB(opcode, A_CJUMP);
+        pkt->pkt_has_cjump_newval |= GET_ATTRIB(opcode, A_DOTNEWVALUE) &&
+                                     GET_ATTRIB(opcode, A_CJUMP);
+
+        canjump = decode_opcode_can_jump(opcode);
+
+        if (pkt->pkt_has_cof) {
+            if (canjump) {
+                pkt->pkt_has_dual_jump = 1;
+                pkt->insn[i].is_2nd_jump = 1;
+            }
+        } else {
+            pkt->pkt_has_cof |= canjump;
+        }
+
+        pkt->insn[i].is_endloop = decode_opcode_ends_loop(opcode);
+
+        pkt->pkt_has_endloop |= pkt->insn[i].is_endloop;
+        pkt->pkt_has_endloop0 |= GET_ATTRIB(opcode, A_HWLOOP0_END) &&
+                                 !GET_ATTRIB(opcode, A_HWLOOP1_END);
+        pkt->pkt_has_endloop01 |= GET_ATTRIB(opcode, A_HWLOOP0_END) &&
+                                  GET_ATTRIB(opcode, A_HWLOOP1_END);
+        pkt->pkt_has_endloop1 |= GET_ATTRIB(opcode, A_HWLOOP1_END) &&
+                                 !GET_ATTRIB(opcode, A_HWLOOP0_END);
+
+        pkt->pkt_has_cof |= pkt->pkt_has_endloop;
+
+        /* Now create slot valids */
+        if (pkt->insn[i].is_endloop)    /* Don't count endloops */
+            continue;
+
+        switch (pkt->insn[i].slot) {
+        case 0:
+            pkt->slot0_valid = 1;
+            break;
+        case 1:
+            pkt->slot1_valid = 1;
+            break;
+        case 2:
+            pkt->slot2_valid = 1;
+            break;
+        case 3:
+            pkt->slot3_valid = 1;
+        break;
+        }
+        total_slots_valid++;
+
+        /* And track #loads/stores */
+        if (pkt->insn[i].is_store) {
+            stores++;
+        } else if (pkt->insn[i].is_load) {
+            loads++;
+        }
+    }
+
+    if (stores == 2) {
+        pkt->dual_store = 1;
+    } else if (loads == 2) {
+        pkt->dual_load = 1;
+    } else if ((loads == 1) && (stores == 1)) {
+        pkt->load_and_store = 1;
+    } else if (loads == 1) {
+        pkt->single_load = 1;
+    } else if (stores == 1) {
+        pkt->single_store = 1;
+    }
+
+    return 0;
+}
+
+/*
+ * Shuffle for execution
+ * Move stores to end (in same order as encoding)
+ * Move compares to beginning (for use by .new insns)
+ */
+static int decode_shuffle_for_execution(packet_t *packet)
+{
+    int changed = 0;
+    int i;
+    int flag;    /* flag means we've seen a non-memory instruction */
+    int n_mems;
+    int last_insn = packet->num_insns - 1;
+
+    /*
+     * Skip end loops, somehow an end loop is getting in and messing
+     * up the order
+     */
+    if (decode_opcode_ends_loop(packet->insn[last_insn].opcode)) {
+        last_insn--;
+    }
+
+    do {
+        changed = 0;
+        /*
+         * Stores go last, must not reorder.
+         * Cannot shuffle stores past loads, either.
+         * Iterate backwards.  If we see a non-memory instruction,
+         * then a store, shuffle the store to the front.  Don't shuffle
+         *  stores wrt each other or a load.
+         */
+        for (flag = n_mems = 0, i = last_insn; i >= 0; i--) {
+            int opcode = packet->insn[i].opcode;
+
+            if (flag && GET_ATTRIB(opcode, A_STORE)) {
+                decode_send_insn_to(packet, i, last_insn - n_mems);
+                n_mems++;
+                changed = 1;
+            } else if (GET_ATTRIB(opcode, A_STORE)) {
+                n_mems++;
+            } else if (GET_ATTRIB(opcode, A_LOAD)) {
+                /*
+                 * Don't set flag, since we don't want to shuffle a
+                 * store pasta load
+                 */
+                n_mems++;
+            } else if (GET_ATTRIB(opcode, A_DOTNEWVALUE)) {
+                /*
+                 * Don't set flag, since we don't want to shuffle past
+                 * a .new value
+                 */
+            } else {
+                flag = 1;
+            }
+        }
+
+        if (changed) {
+            continue;
+        }
+        /* Compares go first, may be reordered wrt each other */
+        for (flag = 0, i = 0; i < last_insn + 1; i++) {
+            int opcode = packet->insn[i].opcode;
+
+            if ((strstr(opcode_wregs[opcode], "Pd4") ||
+                 strstr(opcode_wregs[opcode], "Pe4")) &&
+                GET_ATTRIB(opcode, A_STORE) == 0) {
+                /* This should be a compare (not a store conditional) */
+                if (flag) {
+                    decode_send_insn_to(packet, i, 0);
+                    changed = 1;
+                    continue;
+                }
+            } else if (GET_ATTRIB(opcode, A_IMPLICIT_WRITES_P3) &&
+                       !decode_opcode_ends_loop(packet->insn[i].opcode)) {
+                /*
+                 * spNloop instruction
+                 * Don't reorder endloops; they are not valid for .new uses,
+                 * and we want to match HW
+                 */
+                if (flag) {
+                    decode_send_insn_to(packet, i, 0);
+                    changed = 1;
+                    continue;
+                }
+            } else if (GET_ATTRIB(opcode, A_IMPLICIT_WRITES_P0) &&
+                       !GET_ATTRIB(opcode, A_NEWCMPJUMP)) {
+                /* CABAC instruction */
+                if (flag) {
+                    decode_send_insn_to(packet, i, 0);
+                    changed = 1;
+                    continue;
+                }
+            } else {
+                flag = 1;
+            }
+        }
+        if (changed) {
+            continue;
+        }
+    } while (changed);
+
+    /*
+     * If we have a .new register compare/branch, move that to the very
+     * very end, past stores
+     */
+    for (i = 0; i < last_insn; i++) {
+        if (GET_ATTRIB(packet->insn[i].opcode, A_DOTNEWVALUE)) {
+            decode_send_insn_to(packet, i, last_insn);
+            break;
+        }
+    }
+
+    /*
+     * And at the very very very end, move any RTE's, since they update
+     * user/supervisor mode.
+     */
+    for (i = 0; i < last_insn; i++) {
+        if ((packet->insn[i].opcode == J2_rte)) {
+            decode_send_insn_to(packet, i, last_insn);
+            break;
+        }
+    }
+    return 0;
+}
+
+static void decode_assembler_count_fpops(packet_t *pkt)
+{
+    int i;
+    for (i = 0; i < pkt->num_insns; i++) {
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_FPOP)) {
+            pkt->pkt_has_fp_op = 1;
+        }
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_FPDOUBLE)) {
+            pkt->pkt_has_fpdp_op = 1;
+        } else if (GET_ATTRIB(pkt->insn[i].opcode, A_FPSINGLE)) {
+            pkt->pkt_has_fpsp_op = 1;
+        }
+    }
+}
+
+static int
+apply_extender(packet_t *pkt, int i, size4u_t extender)
+{
+    int immed_num;
+    size4u_t base_immed;
+
+    immed_num = opcode_which_immediate_is_extended(pkt->insn[i].opcode);
+    base_immed = pkt->insn[i].immed[immed_num];
+
+    pkt->insn[i].immed[immed_num] = extender | fZXTN(6, 32, base_immed);
+    return 0;
+}
+
+static int decode_apply_extenders(packet_t *packet)
+{
+    int i;
+    for (i = 0; i < packet->num_insns; i++) {
+        if (GET_ATTRIB(packet->insn[i].opcode, A_IT_EXTENDER)) {
+            packet->insn[i + 1].extension_valid = 1;
+            packet->pkt_has_payload = 1;
+            apply_extender(packet, i + 1, packet->insn[i].immed[0]);
+        }
+    }
+    return 0;
+}
+
+static int decode_remove_extenders(packet_t *packet)
+{
+    int i, j;
+    for (i = 0; i < packet->num_insns; i++) {
+        if (GET_ATTRIB(packet->insn[i].opcode, A_IT_EXTENDER)) {
+            for (j = i;
+                (j < packet->num_insns - 1) && (j < INSTRUCTIONS_MAX - 1);
+                j++) {
+                packet->insn[j] = packet->insn[j + 1];
+            }
+            packet->num_insns--;
+        }
+    }
+    return 0;
+}
+
+static const char *
+get_valid_slot_str(const packet_t *pkt, unsigned int slot)
+{
+    return find_iclass_slots(pkt->insn[slot].opcode,
+                             pkt->insn[slot].iclass);
+}
+
+#include "q6v_decode.c"
+
+packet_t *decode_this(int max_words, size4u_t *words, packet_t *decode_pkt)
+{
+    int ret;
+    ret = do_decode_packet(max_words, words, decode_pkt);
+    if (ret <= 0) {
+        /* ERROR or BAD PARSE */
+        return NULL;
+    }
+    return decode_pkt;
+}
+
+/* Used for "-d in_asm" logging */
+int disassemble_hexagon(uint32_t *words, int nwords, char *buf, int bufsize)
+{
+    packet_t pkt;
+
+    if (decode_this(nwords, words, &pkt)) {
+        snprint_a_pkt(buf, bufsize, &pkt);
+        return pkt.encod_pkt_size_in_bytes;
+    } else {
+        snprintf(buf, bufsize, "<invalid>");
+        return 0;
+    }
+}
diff --git a/target/hexagon/q6v_decode.c b/target/hexagon/q6v_decode.c
new file mode 100644
index 0000000..f2b1548
--- /dev/null
+++ b/target/hexagon/q6v_decode.c
@@ -0,0 +1,402 @@
+/*
+ *  Copyright(c) 2019-2020 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define DECODE_NEW_TABLE(TAG, SIZE, WHATNOT)     /* NOTHING */
+#define TABLE_LINK(TABLE)                        /* NOTHING */
+#define TERMINAL(TAG, ENC)                       /* NOTHING */
+#define SUBINSNS(TAG, CLASSA, CLASSB, ENC)       /* NOTHING */
+#define EXTSPACE(TAG, ENC)                       /* NOTHING */
+#define INVALID()                                /* NOTHING */
+#define DECODE_END_TABLE(...)                    /* NOTHING */
+#define DECODE_MATCH_INFO(...)                   /* NOTHING */
+#define DECODE_LEGACY_MATCH_INFO(...)            /* NOTHING */
+
+#define DECODE_REG(REGNO, WIDTH, STARTBIT) \
+    insn->regno[REGNO] = ((encoding >> STARTBIT) & ((1 << WIDTH) - 1));
+
+#define DECODE_IMPL_REG(REGNO, VAL) \
+    insn->regno[REGNO] = VAL;
+
+#define DECODE_IMM(IMMNO, WIDTH, STARTBIT, VALSTART) \
+    insn->immed[IMMNO] |= (((encoding >> STARTBIT) & ((1 << WIDTH) - 1))) << \
+                          (VALSTART);
+
+#define DECODE_IMM_SXT(IMMNO, WIDTH) \
+    insn->immed[IMMNO] = ((((size4s_t)insn->immed[IMMNO]) << (32 - WIDTH)) >> \
+                          (32 - WIDTH));
+
+#define DECODE_IMM_NEG(IMMNO, WIDTH) \
+    insn->immed[IMMNO] = -insn->immed[IMMNO];
+
+#define DECODE_IMM_SHIFT(IMMNO, SHAMT)                                 \
+    if ((!insn->extension_valid) || \
+        (insn->which_extended != IMMNO)) { \
+        insn->immed[IMMNO] <<= SHAMT; \
+    }
+
+#define DECODE_OPINFO(TAG, BEH) \
+    case TAG: \
+        { BEH  } \
+        break; \
+
+static void
+decode_op(insn_t *insn, opcode_t tag, size4u_t encoding)
+{
+    insn->immed[0] = 0;
+    insn->immed[1] = 0;
+    if (insn->extension_valid) {
+        insn->which_extended = opcode_which_immediate_is_extended(tag);
+    }
+    insn->opcode = tag;
+
+    switch (tag) {
+#include "dectree_generated.h"
+    default:
+        break;
+    }
+
+    insn->generate = opcode_genptr[tag];
+    insn->iclass = (encoding >> 28) & 0xf;
+    if (((encoding >> 14) & 3) == 0) {
+        insn->iclass += 16;
+    }
+}
+
+#undef DECODE_REG
+#undef DECODE_IMPL_REG
+#undef DECODE_IMM
+#undef DECODE_IMM_SHIFT
+#undef DECODE_OPINFO
+#undef DECODE_MATCH_INFO
+#undef DECODE_LEGACY_MATCH_INFO
+#undef DECODE_END_TABLE
+#undef INVALID
+#undef TERMINAL
+#undef SUBINSNS
+#undef EXTSPACE
+#undef TABLE_LINK
+#undef DECODE_NEW_TABLE
+#undef DECODE_SEPARATOR_BITS
+
+static unsigned int
+decode_subinsn_tablewalk(insn_t *insn, dectree_table_t *table,
+                         size4u_t encoding)
+{
+    unsigned int i;
+    opcode_t opc;
+    if (table->lookup_function) {
+        i = table->lookup_function(table->startbit, table->width, encoding);
+    } else {
+        i = ((encoding >> table->startbit) & ((1 << table->width) - 1));
+    }
+    if (table->table[i].type == DECTREE_TABLE_LINK) {
+        return decode_subinsn_tablewalk(insn, table->table[i].table_link,
+                                        encoding);
+    } else if (table->table[i].type == DECTREE_TERMINAL) {
+        opc = table->table[i].opcode;
+        if ((encoding & decode_itable[opc].mask) != decode_itable[opc].match) {
+            return 0;
+        }
+        decode_op(insn, opc, encoding);
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static unsigned int get_insn_a(size4u_t encoding)
+{
+    return encoding & 0x00001fff;
+}
+
+static unsigned int get_insn_b(size4u_t encoding)
+{
+    return (encoding >> 16) & 0x00001fff;
+}
+
+static unsigned int
+decode_insns_tablewalk(insn_t *insn, dectree_table_t *table, size4u_t encoding)
+{
+    unsigned int i;
+    unsigned int a, b;
+    opcode_t opc;
+    if (table->lookup_function) {
+        i = table->lookup_function(table->startbit, table->width, encoding);
+    } else {
+        i = ((encoding >> table->startbit) & ((1 << table->width) - 1));
+    }
+    if (table->table[i].type == DECTREE_TABLE_LINK) {
+        return decode_insns_tablewalk(insn, table->table[i].table_link,
+                                      encoding);
+    } else if (table->table[i].type == DECTREE_SUBINSNS) {
+        a = get_insn_a(encoding);
+        b = get_insn_b(encoding);
+        b = decode_subinsn_tablewalk(insn, table->table[i].table_link_b, b);
+        a = decode_subinsn_tablewalk(insn + 1, table->table[i].table_link, a);
+        if ((a == 0) || (b == 0)) {
+            return 0;
+        }
+        return 2;
+    } else if (table->table[i].type == DECTREE_TERMINAL) {
+        opc = table->table[i].opcode;
+        if ((encoding & decode_itable[opc].mask) != decode_itable[opc].match) {
+            if ((encoding & decode_legacy_itable[opc].mask) !=
+                decode_legacy_itable[opc].match) {
+                return 0;
+            }
+        }
+        decode_op(insn, opc, encoding);
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static unsigned int
+decode_insns(insn_t *insn, size4u_t encoding)
+{
+    dectree_table_t *table;
+    if ((encoding & 0x0000c000) != 0) {
+        /* Start with PP table */
+        table = &dectree_table_DECODE_ROOT_32;
+    } else {
+        /* start with EE table */
+        table = &dectree_table_DECODE_ROOT_EE;
+    }
+    return decode_insns_tablewalk(insn, table, encoding);
+}
+
+static void decode_add_endloop_insn(insn_t *insn, int loopnum)
+{
+    if (loopnum == 10) {
+        insn->opcode = J2_endloop01;
+        insn->generate = opcode_genptr[J2_endloop01];
+    } else if (loopnum == 1) {
+        insn->opcode = J2_endloop1;
+        insn->generate = opcode_genptr[J2_endloop1];
+    } else {
+        insn->opcode = J2_endloop0;
+        insn->generate = opcode_genptr[J2_endloop0];
+    }
+}
+
+static inline int decode_parsebits_is_end(size4u_t encoding32)
+{
+    size4u_t bits = (encoding32 >> 14) & 0x3;
+    return ((bits == 0x3) || (bits == 0x0));
+}
+
+static inline int decode_parsebits_is_loopend(size4u_t encoding32)
+{
+    size4u_t bits = (encoding32 >> 14) & 0x3;
+    return ((bits == 0x2));
+}
+
+static int
+decode_set_slot_number(packet_t *pkt)
+{
+    int slot;
+    int i;
+    int hit_mem_insn = 0;
+    int hit_duplex = 0;
+    const char *valid_slot_str;
+
+    for (i = 0, slot = 3; i < pkt->num_insns; i++) {
+        valid_slot_str = get_valid_slot_str(pkt, i);
+
+        while (strchr(valid_slot_str, '0' + slot) == NULL) {
+            slot--;
+        }
+        pkt->insn[i].slot = slot;
+        if (slot) {
+            /* I've assigned the slot, now decrement it for the next insn */
+            slot--;
+        }
+    }
+
+    /* Fix the exceptions - mem insns to slot 0,1 */
+    for (i = pkt->num_insns - 1; i >= 0; i--) {
+
+        /* First memory instruction always goes to slot 0 */
+        if ((GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE) ||
+             GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE_PACKET_RULES)) &&
+            !hit_mem_insn) {
+            hit_mem_insn = 1;
+            pkt->insn[i].slot = 0;
+            continue;
+        }
+
+        /* Next memory instruction always goes to slot 1 */
+        if ((GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE) ||
+             GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE_PACKET_RULES)) &&
+            hit_mem_insn) {
+            pkt->insn[i].slot = 1;
+        }
+    }
+
+    /* Fix the exceptions - duplex always slot 0,1 */
+    for (i = pkt->num_insns - 1; i >= 0; i--) {
+
+        /* First subinsn always goes to slot 0 */
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN) && !hit_duplex) {
+            pkt->pkt_has_duplex = 1;
+            hit_duplex = 1;
+            pkt->insn[i].slot = 0;
+            continue;
+        }
+
+        /* Next subinsn always goes to slot 1 */
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN) && hit_duplex) {
+            pkt->insn[i].slot = 1;
+        }
+    }
+
+    /* Fix the exceptions - slot 1 is never empty, always aligns to slot 0 */
+    {
+        int slot0_found = 0;
+        int slot1_found = 0;
+        int slot1_iidx = 0;
+        for (i = pkt->num_insns - 1; i >= 0; i--) {
+            /* Is slot0 used? */
+            if (pkt->insn[i].slot == 0) {
+                int is_endloop = (pkt->insn[i].opcode == J2_endloop01);
+                is_endloop |= (pkt->insn[i].opcode == J2_endloop0);
+                is_endloop |= (pkt->insn[i].opcode == J2_endloop1);
+
+                /*
+                 * Make sure it's not endloop since, we're overloading
+                 * slot0 for endloop
+                 */
+                if (!is_endloop) {
+                    slot0_found = 1;
+                }
+            }
+            /* Is slot1 used? */
+            if (pkt->insn[i].slot == 1) {
+                slot1_found = 1;
+                slot1_iidx = i;
+            }
+        }
+        /* Is slot0 empty and slot1 used? */
+        if ((slot0_found == 0) && (slot1_found == 1)) {
+            /* Then push it to slot0 */
+            pkt->insn[slot1_iidx].slot = 0;
+        }
+    }
+    return 0;
+}
+
+/*
+ * do_decode_packet
+ * Decodes packet with given words
+ * Returns negative on error, 0 on insufficient words,
+ * and number of words used on success
+ */
+
+static int do_decode_packet(int max_words, const size4u_t *words, packet_t *pkt)
+{
+    int num_insns = 0;
+    int words_read = 0;
+    int end_of_packet = 0;
+    int new_insns = 0;
+    int num_mems = 0;
+    int errors = 0;
+    int i;
+    size4u_t encoding32;
+
+    /* Initialize */
+    memset(pkt, 0, sizeof(*pkt));
+    /* Try to build packet */
+    while (!end_of_packet && (words_read < max_words)) {
+        encoding32 = words[words_read];
+        end_of_packet = decode_parsebits_is_end(encoding32);
+        new_insns = decode_insns(&pkt->insn[num_insns], encoding32);
+        /*
+         * If we saw an extender, mark next word extended so immediate
+         * decode works
+         */
+        if (pkt->insn[num_insns].opcode == A4_ext) {
+            pkt->insn[num_insns + 1].extension_valid = 1;
+            pkt->pkt_has_payload = 1;
+        }
+        num_insns += new_insns;
+        words_read++;
+    }
+
+    pkt->num_insns = num_insns;
+    if (!end_of_packet) {
+        /* Ran out of words! */
+        return 0;
+    }
+    pkt->encod_pkt_size_in_bytes = words_read * 4;
+    /* Check packet / aux info */
+    for (i = 0; i < num_insns; i++) {
+        if (GET_ATTRIB(pkt->insn[i].opcode, A_MEMCPY)) {
+            num_mems += 2;
+        } else if (GET_ATTRIB(pkt->insn[i].opcode, A_LOAD) ||
+                   GET_ATTRIB(pkt->insn[i].opcode, A_STORE)) {
+            num_mems++;
+        }
+        if (pkt->insn[i].opcode == A4_ext) {
+            pkt->insn[i + 1].extension_valid = 1;
+            pkt->pkt_has_payload = 1;
+        }
+    }
+    pkt->pkt_has_initloop = 0;
+    pkt->pkt_has_initloop0 = 0;
+    pkt->pkt_has_initloop1 = 0;
+    for (i = 0; i < num_insns; i++) {
+        pkt->pkt_has_initloop0 |=
+            GET_ATTRIB(pkt->insn[i].opcode, A_HWLOOP0_SETUP);
+        pkt->pkt_has_initloop1 |=
+            GET_ATTRIB(pkt->insn[i].opcode, A_HWLOOP1_SETUP);
+    }
+    pkt->pkt_has_initloop |= pkt->pkt_has_initloop0 | pkt->pkt_has_initloop1;
+
+    /* Shuffle / split / reorder for execution */
+    if ((words_read == 2) && (decode_parsebits_is_loopend(words[0]))) {
+        decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 0);
+    }
+    if (words_read >= 3) {
+        size4u_t has_loop0, has_loop1;
+        has_loop0 = decode_parsebits_is_loopend(words[0]);
+        has_loop1 = decode_parsebits_is_loopend(words[1]);
+        if (has_loop0 && has_loop1) {
+            decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 10);
+        } else if (has_loop1) {
+            decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 1);
+        } else if (has_loop0) {
+            decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 0);
+        }
+    }
+
+    decode_assembler_count_fpops(pkt);
+
+    errors += decode_apply_extenders(pkt);
+    errors += decode_remove_extenders(pkt);
+    errors += decode_set_slot_number(pkt);
+    errors += decode_fill_newvalue_regno(pkt);
+
+    errors += decode_shuffle_for_execution(pkt);
+    errors += decode_split_cmpjump(pkt);
+    errors += decode_set_insn_attr_fields(pkt);
+    if (errors) {
+        return -1;
+    }
+
+    return words_read;
+}
-- 
2.7.4


  parent reply	other threads:[~2020-02-28 17:04 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-28 16:42 [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 01/67] Hexagon Maintainers Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 02/67] Hexagon README Taylor Simpson
2020-02-28 16:42 ` [RFC PATCH v2 03/67] Hexagon ELF Machine Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 04/67] Hexagon CPU Scalar Core Definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 05/67] Hexagon register names Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 06/67] Hexagon Disassembler Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 07/67] Hexagon CPU Scalar Core Helpers Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 08/67] Hexagon GDB Stub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 09/67] Hexagon architecture types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 10/67] Hexagon instruction and packet types Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 11/67] Hexagon register fields Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 12/67] Hexagon instruction attributes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 13/67] Hexagon register map Taylor Simpson
2020-02-28 16:43 ` Taylor Simpson [this message]
2020-02-28 16:43 ` [RFC PATCH v2 15/67] Hexagon instruction printing Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 16/67] Hexagon arch import - instruction semantics definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 17/67] Hexagon arch import - macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 18/67] Hexagon arch import - instruction encoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 19/67] Hexagon instruction class definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 20/67] Hexagon instruction utility functions Taylor Simpson
2020-04-09 18:53   ` Brian Cain
2020-04-09 20:22     ` Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 21/67] Hexagon generator phase 1 - C preprocessor for semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 22/67] Hexagon generator phase 2 - qemu_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 23/67] Hexagon generator phase 2 - qemu_wrap_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 24/67] Hexagon generator phase 2 - opcodes_def_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 25/67] Hexagon generator phase 2 - op_attribs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 26/67] Hexagon generator phase 2 - op_regs_generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 27/67] Hexagon generator phase 2 - printinsn-generated.h Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 28/67] Hexagon generator phase 3 - C preprocessor for decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 29/67] Hexagon generater phase 4 - Decode tree Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 30/67] Hexagon opcode data structures Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 31/67] Hexagon macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 32/67] Hexagon macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 33/67] Hexagon instruction classes Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 34/67] Hexagon TCG generation helpers - step 1 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 37/67] Hexagon TCG generation helpers - step 4 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 38/67] Hexagon TCG generation helpers - step 5 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 39/67] Hexagon TCG generation - step 01 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 40/67] Hexagon TCG generation - step 02 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 41/67] Hexagon TCG generation - step 03 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 42/67] Hexagon TCG generation - step 04 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 43/67] Hexagon TCG generation - step 05 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 44/67] Hexagon TCG generation - step 06 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 45/67] Hexagon TCG generation - step 07 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 46/67] Hexagon TCG generation - step 08 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 47/67] Hexagon TCG generation - step 09 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 48/67] Hexagon TCG generation - step 10 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 49/67] Hexagon TCG generation - step 11 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 50/67] Hexagon TCG generation - step 12 Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 51/67] Hexagon translation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 52/67] Hexagon Linux user emulation Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 53/67] Hexagon build infrastructure Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 54/67] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 55/67] Hexagon HVX support in gdbstub Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 56/67] Hexagon HVX import instruction encodings Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 57/67] Hexagon HVX import semantics Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 58/67] Hexagon HVX import macro definitions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 59/67] Hexagon HVX semantics generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 60/67] Hexagon HVX instruction decoding Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 62/67] Hexagon HVX macros to interface with the generator Taylor Simpson
2020-02-28 16:43 ` [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 64/67] Hexagon HVX helper to commit vector stores (masked and scatter/gather) Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 65/67] Hexagon HVX TCG generation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 66/67] Hexagon HVX translation Taylor Simpson
2020-02-28 16:44 ` [RFC PATCH v2 67/67] Hexagon HVX build infrastructure Taylor Simpson
2020-03-25 21:13 ` [RFC PATCH v2 00/67] Hexagon patch series Taylor Simpson
2020-04-30 20:53   ` Taylor Simpson

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