From: Alistair Francis <1885350@bugs.launchpad.net>
To: qemu-devel@nongnu.org
Subject: [Bug 1885350] Re: RISCV dynamic rounding mode is not behaving correctly
Date: Tue, 30 Jun 2020 20:43:10 -0000 [thread overview]
Message-ID: <159354979062.15406.11232992155109006963.malone@soybean.canonical.com> (raw)
In-Reply-To: 159323684589.25927.6403829131374464357.malonedeb@gac.canonical.com
This does look like incorrect behaviour. I have sent a patch to the
mailing list. You can see the patch here:
https://patchew.org/QEMU/cover.1593547870.git.alistair.francis@wdc.com/ea4f280e6f77e734c8e555e3c98d10085ce9f5b6.1593547870.git.alistair.francis@wdc.com/
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https://bugs.launchpad.net/bugs/1885350
Title:
RISCV dynamic rounding mode is not behaving correctly
Status in QEMU:
New
Bug description:
Hello,
I’ve gone through the RISC-V code in latest QEMU release
(qemu-5.0.0-rc2) and when checking the Floating point encodings I
found the rounding mode is only updated if the opcode field “rm” is
changed “ctx->frm == rm”. But according to RISC-V Volume I:
Unprivileged ISA, there’s a dynamic mode when rm=7 where the rounding
mode is set with frm value.
So for the same rm value (=7) and when changing frm value seeking
different rounding modes, and according to the below code, the
rounding mode won’t be updated. Please correct me if I got this
implementation wrong.
static void gen_set_rm(DisasContext *ctx, int rm)
{
TCGv_i32 t0;
if (ctx->frm == rm) {
return;
}
ctx->frm = rm;
t0 = tcg_const_i32(rm);
gen_helper_set_rounding_mode(cpu_env, t0);
tcg_temp_free_i32(t0);
}
My testcase:
I set statically the rm field in the instruction to 7 and before this execution I changed the value of frm field in fcsr register. For the 1st time it worked (according to the code above, the rm is updated so the round mode will also be updated). But when changing fcsr register an re-execute the instruction, there's no difference and the rounding mode is the same like the previous frm value.
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next prev parent reply other threads:[~2020-06-30 20:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-27 5:47 [Bug 1885350] [NEW] RISCV dynamic rounding mode is not behaving correctly Mina Magdy
2020-06-27 11:08 ` [Bug 1885350] " Mina Magdy
2020-06-30 17:34 ` Alistair Francis
2020-06-30 20:43 ` Alistair Francis [this message]
2020-06-30 20:59 ` Mina Magdy
2020-11-19 20:21 ` Alistair Francis
2020-12-22 0:53 ` Alistair Francis
2021-05-17 18:58 ` Thomas Huth
2021-07-17 4:17 ` Launchpad Bug Tracker
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