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Thu, 22 Oct 2020 08:25:28 +0000 Received: from abhmp0003.oracle.com (abhmp0003.oracle.com [141.146.116.9]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id 09M8PQT5015193; Thu, 22 Oct 2020 08:25:27 GMT Received: from mihai.localdomain (/10.153.73.25) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 22 Oct 2020 01:25:26 -0700 From: Mihai Carabas To: peter.maydell@linaro.org, shannon.zhaosl@gmail.com, mst@redhat.com, imammedo@redhat.com Subject: [PATCH 3/8] hw/misc/pvpanic: Add the MMIO interface Date: Thu, 22 Oct 2020 10:42:51 +0300 Message-Id: <1603352576-21671-4-git-send-email-mihai.carabas@oracle.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603352576-21671-1-git-send-email-mihai.carabas@oracle.com> References: <1603352576-21671-1-git-send-email-mihai.carabas@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9781 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 mlxscore=0 phishscore=0 malwarescore=0 spamscore=0 suspectscore=1 bulkscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2010220055 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9781 signatures=668682 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 spamscore=0 suspectscore=1 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2010220056 Received-SPF: pass client-ip=141.146.126.78; envelope-from=mihai.carabas@oracle.com; helo=aserp2120.oracle.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/22 04:25:28 X-ACL-Warn: Detected OS = Linux 3.1-3.10 [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mihai Carabas , Peng Hao , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Peng Hao Add new pvpanic type: "TYPE_PVPANIC_MMIO". Reviewed-by: Peter Maydell Signed-off-by: Peng Hao Signed-off-by: Mihai Carabas --- hw/misc/pvpanic.c | 51 +++++++++++++++++++++++++++++++++++++++++++---- include/hw/misc/pvpanic.h | 3 ++- 2 files changed, 49 insertions(+), 5 deletions(-) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index 2e085f4..136f1d6 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -2,10 +2,12 @@ * QEMU simulated pvpanic device. * * Copyright Fujitsu, Corp. 2013 + * Copyright (c) 2018 ZTE Ltd. * * Authors: * Wen Congyang * Hu Tao + * Peng Hao * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -34,6 +36,10 @@ typedef struct PVPanicISAState PVPanicISAState; DECLARE_INSTANCE_CHECKER(PVPanicISAState, PVPANIC_ISA_DEVICE, TYPE_PVPANIC_ISA) +typedef struct PVPanicMMIOState PVPanicMMIOState; +DECLARE_INSTANCE_CHECKER(PVPanicMMIOState, PVPANIC_MMIO_DEVICE, + TYPE_PVPANIC_MMIO) + static void handle_event(int event) { static bool logged; @@ -67,21 +73,32 @@ struct PVPanicISAState { uint16_t ioport; }; +/* PVPanicMMIOState for sysbus device and + * use mmio. + */ +typedef struct PVPanicMMIOState { + SysBusDevice parent_obj; + /**/ + + /* public */ + MemoryRegion mr; +} PVPanicMMIOState; + /* return supported events on read */ -static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size) { return PVPANIC_PANICKED; } -static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val, +static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { handle_event(val); } static const MemoryRegionOps pvpanic_ops = { - .read = pvpanic_ioport_read, - .write = pvpanic_ioport_write, + .read = pvpanic_read, + .write = pvpanic_write, .impl = { .min_access_size = 1, .max_access_size = 1, @@ -136,9 +153,35 @@ static TypeInfo pvpanic_isa_info = { .class_init = pvpanic_isa_class_init, }; +static void pvpanic_mmio_initfn(Object *obj) +{ + PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, + TYPE_PVPANIC_MMIO, 2); + sysbus_init_mmio(sbd, &s->mr); +} + +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo pvpanic_mmio_info = { + .name = TYPE_PVPANIC_MMIO, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(PVPanicMMIOState), + .instance_init = pvpanic_mmio_initfn, + .class_init = pvpanic_mmio_class_init, +}; + static void pvpanic_register_types(void) { type_register_static(&pvpanic_isa_info); + type_register_static(&pvpanic_mmio_info); } type_init(pvpanic_register_types) diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h index 30e9f8f..ee645dc 100644 --- a/include/hw/misc/pvpanic.h +++ b/include/hw/misc/pvpanic.h @@ -18,12 +18,13 @@ #include "qom/object.h" #define TYPE_PVPANIC_ISA "pvpanic" +#define TYPE_PVPANIC_MMIO "pvpanic-mmio" #define PVPANIC_IOPORT_PROP "ioport" static inline uint16_t pvpanic_port(void) { - Object *o = object_resolve_path_type("", TYPE_PVPANIC, NULL); + Object *o = object_resolve_path_type("", TYPE_PVPANIC_ISA, NULL); if (!o) { return 0; } -- 1.8.3.1