From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, bcain@quicinc.com, philmd@redhat.com,
richard.henderson@linaro.org, laurent@vivier.eu,
tsimpson@quicinc.com, alex.bennee@linaro.org
Subject: [PATCH v8 33/35] Hexagon (tests/tcg/hexagon) TCG tests - floating point
Date: Sun, 7 Feb 2021 23:46:23 -0600 [thread overview]
Message-ID: <1612763186-18161-34-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1612763186-18161-1-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
tests/tcg/hexagon/fpstuff.c | 370 ++++++++++++++++++++++++++++++++++++++
tests/tcg/hexagon/Makefile.target | 1 +
2 files changed, 371 insertions(+)
create mode 100644 tests/tcg/hexagon/fpstuff.c
diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c
new file mode 100644
index 0000000..e4f1a0e
--- /dev/null
+++ b/tests/tcg/hexagon/fpstuff.c
@@ -0,0 +1,370 @@
+/*
+ * Copyright(c) 2020-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * This test checks various FP operations performed on Hexagon
+ */
+
+#include <stdio.h>
+
+const int FPINVF_BIT = 1; /* Invalid */
+const int FPINVF = 1 << FPINVF_BIT;
+const int FPDBZF_BIT = 2; /* Divide by zero */
+const int FPDBZF = 1 << FPDBZF_BIT;
+const int FPOVFF_BIT = 3; /* Overflow */
+const int FPOVFF = 1 << FPOVFF_BIT;
+const int FPUNFF_BIT = 4; /* Underflow */
+const int FPUNFF = 1 << FPUNFF_BIT;
+const int FPINPF_BIT = 5; /* Inexact */
+const int FPINPF = 1 << FPINPF_BIT;
+
+const int SF_ZERO = 0x00000000;
+const int SF_NaN = 0x7fc00000;
+const int SF_NaN_special = 0x7f800001;
+const int SF_ANY = 0x3f800000;
+const int SF_HEX_NAN = 0xffffffff;
+
+const long long DF_NaN = 0x7ff8000000000000ULL;
+const long long DF_ANY = 0x3f80000000000000ULL;
+const long long DF_HEX_NAN = 0xffffffffffffffffULL;
+
+int err;
+
+#define CLEAR_FPSTATUS \
+ "r2 = usr\n\t" \
+ "r2 = clrbit(r2, #1)\n\t" \
+ "r2 = clrbit(r2, #2)\n\t" \
+ "r2 = clrbit(r2, #3)\n\t" \
+ "r2 = clrbit(r2, #4)\n\t" \
+ "r2 = clrbit(r2, #5)\n\t" \
+ "usr = r2\n\t"
+
+static void check_fpstatus_bit(int usr, int expect, int flag, const char *n)
+{
+ int bit = 1 << flag;
+ if ((usr & bit) != (expect & bit)) {
+ printf("ERROR %s: usr = %d, expect = %d\n", n,
+ (usr >> flag) & 1, (expect >> flag) & 1);
+ err++;
+ }
+}
+
+static void check_fpstatus(int usr, int expect)
+{
+ check_fpstatus_bit(usr, expect, FPINVF_BIT, "Invalid");
+ check_fpstatus_bit(usr, expect, FPDBZF_BIT, "Div by zero");
+ check_fpstatus_bit(usr, expect, FPOVFF_BIT, "Overflow");
+ check_fpstatus_bit(usr, expect, FPUNFF_BIT, "Underflow");
+ check_fpstatus_bit(usr, expect, FPINPF_BIT, "Inexact");
+}
+
+static void check32(int val, int expect)
+{
+ if (val != expect) {
+ printf("ERROR: 0x%x != 0x%x\n", val, expect);
+ err++;
+ }
+}
+static void check64(unsigned long long val, unsigned long long expect)
+{
+ if (val != expect) {
+ printf("ERROR: 0x%llx != 0x%llx\n", val, expect);
+ err++;
+ }
+}
+
+static void check_compare_exception(void)
+{
+ int cmp;
+ int usr;
+
+ /* Check that FP compares are quiet (don't raise any execptions) */
+ asm (CLEAR_FPSTATUS
+ "p0 = sfcmp.eq(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "p0 = sfcmp.gt(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "p0 = sfcmp.ge(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "p0 = dfcmp.eq(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "p0 = dfcmp.gt(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "p0 = dfcmp.ge(%2, %3)\n\t"
+ "%0 = p0\n\t"
+ "%1 = usr\n\t"
+ : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "p0", "usr");
+ check32(cmp, 0);
+ check_fpstatus(usr, 0);
+}
+
+static void check_sfminmax(void)
+{
+ int minmax;
+ int usr;
+
+ /*
+ * Execute sfmin/sfmax instructions with one operand as NaN
+ * Check that
+ * Result is the other operand
+ * Invalid bit in USR is not set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = sfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check64(minmax, SF_ANY);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = sfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check64(minmax, SF_ANY);
+ check_fpstatus(usr, 0);
+
+ /*
+ * Execute sfmin/sfmax instructions with both operands NaN
+ * Check that
+ * Result is SF_HEX_NAN
+ * Invalid bit in USR is set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = sfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(SF_NaN), "r"(SF_NaN)
+ : "r2", "usr");
+ check64(minmax, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = sfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(SF_NaN), "r"(SF_NaN)
+ : "r2", "usr");
+ check64(minmax, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+}
+
+static void check_dfminmax(void)
+{
+ unsigned long long minmax;
+ int usr;
+
+ /*
+ * Execute dfmin/dfmax instructions with one operand as NaN
+ * Check that
+ * Result is the other operand
+ * Invalid bit in USR is set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(minmax, DF_ANY);
+ check_fpstatus(usr, FPINVF);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(minmax, DF_ANY);
+ check_fpstatus(usr, FPINVF);
+
+ /*
+ * Execute dfmin/dfmax instructions with both operands NaN
+ * Check that
+ * Result is DF_HEX_NAN
+ * Invalid bit in USR is set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_NaN)
+ : "r2", "usr");
+ check64(minmax, DF_HEX_NAN);
+ check_fpstatus(usr, FPINVF);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_NaN)
+ : "r2", "usr");
+ check64(minmax, DF_HEX_NAN);
+ check_fpstatus(usr, FPINVF);
+}
+
+static void check_canonical_NaN(void)
+{
+ int sf_result;
+ unsigned long long df_result;
+ int usr;
+
+ /* Check that each FP instruction properly returns SF_HEX_NAN/DF_HEX_NAN */
+ asm(CLEAR_FPSTATUS
+ "%0 = sfadd(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = sfsub(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = sfmpy(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ sf_result = SF_ZERO;
+ asm(CLEAR_FPSTATUS
+ "%0 += sfmpy(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "+r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ sf_result = SF_ZERO;
+ asm(CLEAR_FPSTATUS
+ "p0 = !cmp.eq(r0, r0)\n\t"
+ "%0 += sfmpy(%2, %3, p0):scale\n\t"
+ "%1 = usr\n\t"
+ : "+r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr", "p0");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ sf_result = SF_ZERO;
+ asm(CLEAR_FPSTATUS
+ "%0 -= sfmpy(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "+r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ sf_result = SF_ZERO;
+ asm(CLEAR_FPSTATUS
+ "%0 += sfmpy(%2, %3):lib\n\t"
+ "%1 = usr\n\t"
+ : "+r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ sf_result = SF_ZERO;
+ asm(CLEAR_FPSTATUS
+ "%0 -= sfmpy(%2, %3):lib\n\t"
+ "%1 = usr\n\t"
+ : "+r"(sf_result), "=r"(usr) : "r"(SF_NaN), "r"(SF_ANY)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = convert_df2sf(%2)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(sf_result), "=r"(usr) : "r"(DF_NaN)
+ : "r2", "usr");
+ check32(sf_result, SF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = dfadd(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(df_result), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(df_result, DF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = dfsub(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(df_result), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(df_result, DF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm(CLEAR_FPSTATUS
+ "%0 = convert_sf2df(%2)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(df_result), "=r"(usr) : "r"(SF_NaN)
+ : "r2", "usr");
+ check64(df_result, DF_HEX_NAN);
+ check_fpstatus(usr, 0);
+}
+
+int main()
+{
+ check_compare_exception();
+ check_sfminmax();
+ check_dfminmax();
+ check_canonical_NaN();
+
+ puts(err ? "FAIL" : "PASS");
+ return err ? 1 : 0;
+}
diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target
index a54e3c7..616af69 100644
--- a/tests/tcg/hexagon/Makefile.target
+++ b/tests/tcg/hexagon/Makefile.target
@@ -41,5 +41,6 @@ HEX_TESTS += preg_alias
HEX_TESTS += dual_stores
HEX_TESTS += mem_noshuf
HEX_TESTS += atomics
+HEX_TESTS += fpstuff
TESTS += $(HEX_TESTS)
--
2.7.4
next prev parent reply other threads:[~2021-02-08 5:59 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 5:45 [PATCH v8 00/35] Hexagon patch series Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 01/35] Hexagon Update MAINTAINERS file Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 02/35] Hexagon (target/hexagon) README Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 03/35] Hexagon (include/elf.h) ELF machine definition Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 04/35] Hexagon (target/hexagon) scalar core definition Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 05/35] Hexagon (disas) disassembler Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 06/35] Hexagon (target/hexagon) register names Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 07/35] Hexagon (target/hexagon) scalar core helpers Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 08/35] Hexagon (target/hexagon) GDB Stub Taylor Simpson
2021-02-08 5:45 ` [PATCH v8 09/35] Hexagon (target/hexagon) architecture types Taylor Simpson
2021-02-12 0:32 ` Philippe Mathieu-Daudé
2021-02-14 17:16 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 10/35] Hexagon (target/hexagon) instruction and packet types Taylor Simpson
2021-02-14 17:21 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 11/35] Hexagon (target/hexagon) register fields Taylor Simpson
2021-02-14 17:25 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 12/35] Hexagon (target/hexagon) instruction attributes Taylor Simpson
2021-02-14 18:00 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 13/35] Hexagon (target/hexagon) instruction/packet decode Taylor Simpson
2021-02-14 18:31 ` Richard Henderson
2021-03-14 17:23 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 14/35] Hexagon (target/hexagon) instruction printing Taylor Simpson
2021-02-14 18:36 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 15/35] Hexagon (target/hexagon/arch.[ch]) utility functions Taylor Simpson
2021-02-14 20:13 ` Richard Henderson
2021-03-18 3:57 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 16/35] Hexagon (target/hexagon/conv_emu.[ch]) " Taylor Simpson
2021-02-14 20:57 ` Richard Henderson
2021-03-18 3:57 ` Taylor Simpson
2021-03-18 13:30 ` Richard Henderson
2021-03-18 14:11 ` Taylor Simpson
2021-03-18 15:35 ` Richard Henderson
2021-03-18 18:03 ` Taylor Simpson
2021-03-18 18:32 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 17/35] Hexagon (target/hexagon/fma_emu.[ch]) " Taylor Simpson
2021-02-12 0:31 ` Philippe Mathieu-Daudé
2021-02-14 23:14 ` Richard Henderson
2021-03-18 3:57 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 18/35] Hexagon (target/hexagon/imported) arch import Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 19/35] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Taylor Simpson
2021-02-14 23:18 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 20/35] Hexagon (target/hexagon) generator phase 2 - generate header files Taylor Simpson
2021-02-14 23:20 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 21/35] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Taylor Simpson
2021-02-14 23:24 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 22/35] Hexagon (target/hexagon) generater phase 4 - " Taylor Simpson
2021-02-14 23:26 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 23/35] Hexagon (target/hexagon) opcode data structures Taylor Simpson
2021-02-12 0:26 ` Philippe Mathieu-Daudé
2021-02-14 23:27 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 24/35] Hexagon (target/hexagon) macros Taylor Simpson
2021-02-14 23:36 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 25/35] Hexagon (target/hexagon) instruction classes Taylor Simpson
2021-02-14 23:41 ` Richard Henderson
2021-03-14 0:39 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 26/35] Hexagon (target/hexagon) TCG generation Taylor Simpson
2021-02-12 0:22 ` Philippe Mathieu-Daudé
2021-04-05 23:03 ` Taylor Simpson
2021-04-06 9:20 ` Alex Bennée
2021-04-06 15:44 ` Taylor Simpson
2021-02-15 0:06 ` Richard Henderson
2021-03-14 0:39 ` Taylor Simpson
2021-03-14 1:39 ` Richard Henderson
2021-03-15 3:09 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 27/35] Hexagon (target/hexagon) TCG for instructions with multiple definitions Taylor Simpson
2021-02-15 0:33 ` Richard Henderson
2021-03-14 0:41 ` Taylor Simpson
2021-03-14 18:02 ` Richard Henderson
2021-03-15 2:59 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 28/35] Hexagon (target/hexagon) TCG for floating point instructions Taylor Simpson
2021-02-15 0:34 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 29/35] Hexagon (target/hexagon) translation Taylor Simpson
2021-02-15 1:03 ` Richard Henderson
2021-03-14 0:40 ` Taylor Simpson
2021-03-14 1:44 ` Richard Henderson
2021-03-15 3:06 ` Taylor Simpson
2021-03-15 13:31 ` Richard Henderson
2021-03-15 22:19 ` Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 30/35] Hexagon (linux-user/hexagon) Linux user emulation Taylor Simpson
2021-02-08 5:46 ` [PATCH v8 31/35] Hexagon (tests/tcg/hexagon) TCG tests - multiarch Taylor Simpson
2021-02-14 18:14 ` Philippe Mathieu-Daudé
2021-02-15 1:05 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 32/35] Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Taylor Simpson
2021-02-15 1:09 ` Richard Henderson
2021-02-08 5:46 ` Taylor Simpson [this message]
2021-02-15 1:10 ` [PATCH v8 33/35] Hexagon (tests/tcg/hexagon) TCG tests - floating point Richard Henderson
2021-02-08 5:46 ` [PATCH v8 34/35] Hexagon build infrastructure Taylor Simpson
2021-02-15 1:11 ` Richard Henderson
2021-02-08 5:46 ` [PATCH v8 35/35] Add Dockerfile for hexagon Taylor Simpson
2021-02-14 18:50 ` Philippe Mathieu-Daudé
2021-02-17 17:23 ` Alessandro Di Federico via
2021-02-17 17:33 ` Philippe Mathieu-Daudé
2021-02-27 14:10 ` Philippe Mathieu-Daudé
2021-02-27 14:32 ` Brian Cain
2021-02-08 6:25 ` [PATCH v8 00/35] Hexagon patch series no-reply
2021-02-15 1:23 ` Richard Henderson
2021-02-16 20:59 ` Taylor Simpson
2021-02-16 21:17 ` Peter Maydell
2021-02-17 14:23 ` Philippe Mathieu-Daudé
2021-02-17 17:05 ` Richard Henderson
2021-02-17 16:58 ` Richard Henderson
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