From: Peter Maydell <1923861@bugs.launchpad.net>
To: qemu-devel@nongnu.org
Subject: [Bug 1923861] Re: Hardfault when accessing FPSCR register
Date: Mon, 19 Apr 2021 12:59:13 -0000 [thread overview]
Message-ID: <161883715374.2532.1616882740571558279.malone@gac.canonical.com> (raw)
In-Reply-To: 161841503123.8560.18071871517113740352.malonedeb@gac.canonical.com
These fixes are now in master and will be in rc4 and the eventual 6.0
release.
** Changed in: qemu
Status: New => Fix Committed
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https://bugs.launchpad.net/bugs/1923861
Title:
Hardfault when accessing FPSCR register
Status in QEMU:
Fix Committed
Bug description:
QEMU release version: v6.0.0-rc2
command line:
qemu-system-arm -machine mps3-an547 -nographic -kernel <my_project>.elf -semihosting -semihosting-config enable=on,target=native
host operating system: Linux ISCNR90TMR1S 5.4.72-microsoft-standard-
WSL2 #1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64
GNU/Linux
guest operating system: none (bare metal)
Observation:
I am simulating embedded firmware for a Cortex-M55 device, using MPS3-AN547 machine. In the startup code I am accessing the FPSCR core register:
unsigned int fpscr =__get_FPSCR();
fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk);
__set_FPSCR(fpscr);
where the register access functions __get_FPSCR() and
__set_FPSCR(fpscr) are taken from CMSIS_5 at
./CMSIS/Core/include/cmsis_gcc.h
I observe hardfaults upon __get_FPSCR() and __set_FPSCR(fpscr). The
same startup code works fine on the Arm Corstone-300 FVP (MPS3-AN547).
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next prev parent reply other threads:[~2021-04-19 13:06 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-14 15:43 [Bug 1923861] [NEW] Hardfault when accessing FPSCR register ml-0
2021-04-15 13:53 ` [Bug 1923861] " ml-0
2021-04-15 14:21 ` Peter Maydell
2021-04-15 15:36 ` ml-0
2021-04-15 16:07 ` Peter Maydell
2021-04-15 16:44 ` ml-0
2021-04-15 18:17 ` Peter Maydell
2021-04-15 18:32 ` Peter Maydell
2021-04-16 7:51 ` ml-0
2021-04-16 9:20 ` Peter Maydell
2021-04-16 9:53 ` ml-0
2021-04-16 9:53 ` Peter Maydell
2021-04-16 10:10 ` Peter Maydell
2021-04-16 10:43 ` Peter Maydell
2021-04-16 11:07 ` ml-0
2021-04-19 12:59 ` Peter Maydell [this message]
2021-04-30 7:25 ` Thomas Huth
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