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From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
	<eric.auger@redhat.com>, <shannon.zhaosl@gmail.com>,
	<imammedo@redhat.com>, <mst@redhat.com>,
	<marcel.apfelbaum@gmail.com>, <peter.maydell@linaro.org>,
	<ehabkost@redhat.com>, <richard.henderson@linaro.org>,
	<pbonzini@redhat.com>
Cc: xieyingtai@huawei.com, cenjiahui@huawei.com, wangxingang5@huawei.com
Subject: [PATCH RFC v3 0/8] Introduce Bypass IOMMU Feature
Date: Wed, 21 Apr 2021 08:04:55 +0000
Message-ID: <1618992303-19556-1-git-send-email-wangxingang5@huawei.com> (raw)

From: Xingang Wang <wangxingang5@huawei.com>

These patches add support for configure bypass_iommu on/off for
pci root bus, including primary bus and pxb root bus. At present,
All root bus will go through iommu when iommu is configured,
which is not flexible, because in many situations the need for using
iommu and bypass iommu aften exists at the same time.

So this add option to enable/disable bypass_iommu for primary bus
and pxb root bus. The bypass_iommu property is set to false default,
meaning that devcies will go through iommu if no explicit configuration
is added. When bypass_iommu is enabled for the root bus, devices
attached to it will bypass iommu, otherwise devices will go through
iommu.

This feature can be used in this manner:
arm: -machine virt,iommu=smmuv3,bypass_iommu=true
x86: -machine q35,bypass_iommu=true
pxb: -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,bypass_iommu=true 

History:

v2 -> v3:
- rebase on top of v6.0.0-rc4
- Took into account Eric's comments, replace with a bypass_iommu
  proerty 
- When building the IORT idmap, cover the whole RID space

v1 -> v2:
- rebase on top of v6.0.0-rc0
- Fix some issues
- Took into account Eric's comments, and remove the PCI_BUS_IOMMU flag,
  replace it with a property in PCIHostState.
- Add support for x86 iommu option

Xingang Wang (8):
  hw/pci/pci_host: Allow bypass iommu for pci host
  hw/pxb: Add a bypass iommu property
  hw/arm/virt: Add a machine option to bypass iommu for primary bus
  hw/i386: Add a pc machine option to bypass iommu for primary bus
  hw/pci: Add pci_bus_range to get bus number range
  hw/arm/virt-acpi-build: Add explicit IORT idmap for smmuv3 node
  hw/i386/acpi-build: Add explicit scope in DMAR table
  hw/i386/acpi-build: Add bypass_iommu check when building IVRS table

 hw/arm/virt-acpi-build.c            | 128 +++++++++++++++++++++++-----
 hw/arm/virt.c                       |  26 ++++++
 hw/i386/acpi-build.c                |  70 ++++++++++++++-
 hw/i386/pc.c                        |  18 ++++
 hw/pci-bridge/pci_expander_bridge.c |   3 +
 hw/pci-host/q35.c                   |   1 +
 hw/pci/pci.c                        |  33 ++++++-
 hw/pci/pci_host.c                   |   2 +
 include/hw/arm/virt.h               |   1 +
 include/hw/i386/pc.h                |   1 +
 include/hw/pci/pci.h                |   2 +
 include/hw/pci/pci_host.h           |   1 +
 12 files changed, 263 insertions(+), 23 deletions(-)

-- 
2.19.1



             reply index

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-21  8:04 Wang Xingang [this message]
2021-04-21  8:04 ` [PATCH RFC v3 1/8] hw/pci/pci_host: Allow bypass iommu for pci host Wang Xingang
2021-04-21  8:04 ` [PATCH RFC v3 2/8] hw/pxb: Add a bypass iommu property Wang Xingang
2021-04-21  8:04 ` [PATCH RFC v3 3/8] hw/arm/virt: Add a machine option to bypass iommu for primary bus Wang Xingang
2021-04-21  8:04 ` [PATCH RFC v3 4/8] hw/i386: Add a pc " Wang Xingang
2021-04-21  8:05 ` [PATCH RFC v3 5/8] hw/pci: Add pci_bus_range to get bus number range Wang Xingang
2021-04-21  8:05 ` [PATCH RFC v3 6/8] hw/arm/virt-acpi-build: Add explicit IORT idmap for smmuv3 node Wang Xingang
2021-04-21  8:05 ` [PATCH RFC v3 7/8] hw/i386/acpi-build: Add explicit scope in DMAR table Wang Xingang
2021-04-21  8:05 ` [PATCH RFC v3 8/8] hw/i386/acpi-build: Add bypass_iommu check when building IVRS table Wang Xingang

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