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From: Chris Browy <cbrowy@avery-design.com>
To: mst@redhat.com
Cc: ben.widawsky@intel.com, david@redhat.com, qemu-devel@nongnu.org,
	vishal.l.verma@intel.com, jgroves@micron.com,
	Chris Browy <cbrowy@avery-design.com>,
	armbru@redhat.com, linux-cxl@vger.kernel.org, f4bug@amsat.org,
	hchkuo@avery-design.com.tw, tyshao@avery-design.com.tw,
	jonathan.cameron@huawei.com, imammedo@redhat.com,
	dan.j.williams@intel.com, ira.weiny@intel.com
Subject: [PATCH v5 cxl2.0-v3-doe 0/6] QEMU PCIe DOE for PCIe 4.0/5.0 and CXL 2.0
Date: Mon, 26 Apr 2021 12:36:04 -0400	[thread overview]
Message-ID: <1619454964-10190-1-git-send-email-cbrowy@avery-design.com> (raw)

This patch implements the PCIe Data Object Exchange (DOE) for PCIe 4.0/5.0
and later and CXL 2.0 "type-3" memory devices supporting the following protocols:
 1: PCIe DOE Discovery protocol
 2: CXL DOE Compliance Mode protocol
 3: CXL DOE CDAT protocol

Implementation is based on QEMU version which added CXL 2.0 "type-3" support
https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4
6882c0453eea74d639ac75ec0f362d0cf9f1c744

PCIe Data Object Exchange (DOE) implementation for QEMU refers to
"Data Object Exchange ECN, March 12, 2020" [1]

The Data Object Exchange implementation of CXL Compliance Mode is
refers to "Compute Express Link (CXL) Specification, Rev. 2.0, Oct.
2020" [2]

The Data Object Exchange implementation of CXL Coherent Device Attribute
Table (CDAT). This implementation is referring to "Coherent Device
Attribute Table Specification, Rev. 1.02, Oct. 2020" [3] and "Compute
Express Link Specification, Rev. 2.0, Oct. 2020" [2]

The CDAT can be specified in two ways. One is to add ",cdat=<filename>"
in "-device cxl-type3"'s command option. The file is required to provide
the whole CDAT table in binary mode. The other is to use the default
CDAT value created by build_cdat_table in hw/cxl/cxl-cdat.c.

Pre-built CDAT table for testing, contains one CDAT header and six
CDAT entries: DSMAS, DSLBIS, DSMSCIS, DSIS, DSEMTS, and SSLBIS
respectively.

Changes since PATCH v4:
1-3: PCIe DOE linux header and macros and PCIe Discovery protocol
4:   Clean up CXL compliance mode DOE protocol including default responses
5-6: Clean up CXL CDAT DOE protocol including tesing built-in and external CDAT tables

[1]: https://members.pcisig.com/wg/PCI-SIG/document/14143
[2]: https://www.computeexpresslink.org/
[3]: https://uefi.org/sites/default/files/resources/Coherent%20Device%20Attribute%20Table_1.02.pdf

hchkuo (6):
  standard-headers/linux/pci_regs: PCI header from Linux kernel
  include/hw/pci: headers for PCIe DOE
  hw/pci: PCIe Data Object Exchange implementation
  cxl/compliance: CXL Compliance Data Object Exchange implementation
  cxl/cdat: CXL CDAT Data Object Exchange implementation
  test/cdat: CXL CDAT test data

 MAINTAINERS                               |   7 +
 hw/cxl/cxl-cdat.c                         | 228 +++++++++++++
 hw/cxl/meson.build                        |   1 +
 hw/mem/cxl_type3.c                        | 202 ++++++++++++
 hw/pci/meson.build                        |   1 +
 hw/pci/pcie_doe.c                         | 374 ++++++++++++++++++++++
 include/hw/cxl/cxl_cdat.h                 | 149 +++++++++
 include/hw/cxl/cxl_compliance.h           | 293 +++++++++++++++++
 include/hw/cxl/cxl_component.h            |   7 +
 include/hw/cxl/cxl_device.h               |   4 +
 include/hw/cxl/cxl_pci.h                  |   2 +
 include/hw/pci/pci_ids.h                  |   2 +
 include/hw/pci/pcie.h                     |   1 +
 include/hw/pci/pcie_doe.h                 | 123 +++++++
 include/hw/pci/pcie_regs.h                |   3 +
 include/standard-headers/linux/pci_regs.h |   3 +-
 tests/data/cdat/cdat.dat                  | Bin 0 -> 148 bytes
 17 files changed, 1399 insertions(+), 1 deletion(-)
 create mode 100644 hw/cxl/cxl-cdat.c
 create mode 100644 hw/pci/pcie_doe.c
 create mode 100644 include/hw/cxl/cxl_cdat.h
 create mode 100644 include/hw/cxl/cxl_compliance.h
 create mode 100644 include/hw/pci/pcie_doe.h
 create mode 100644 tests/data/cdat/cdat.dat

-- 
2.17.1



             reply	other threads:[~2021-04-26 16:38 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-26 16:36 Chris Browy [this message]
2021-04-26 16:52 ` [PATCH v5 cxl2.0-v3-doe 1/6] standard-headers/linux/pci_regs: PCI header from Linux kernel Chris Browy
2021-04-26 17:16 ` [PATCH v5 cxl2.0-v3-doe 2/6] include/hw/pci: headers for PCIe DOE Chris Browy
2021-04-28 10:59   ` Jonathan Cameron
2021-04-26 17:28 ` [PATCH v5 cxl2.0-v3-doe 3/6] hw/pci: PCIe Data Object Exchange implementation Chris Browy
2021-04-28 13:25   ` Jonathan Cameron
2021-04-26 17:33 ` [PATCH v5 cxl2.0-v3-doe 4/6] cxl/compliance: CXL Compliance " Chris Browy
2021-04-28 13:29   ` Jonathan Cameron
2021-04-26 17:36 ` [PATCH v5 cxl2.0-v3-doe 5/6] cxl/cdat: CXL CDAT " Chris Browy
2021-04-28 13:47   ` Jonathan Cameron
2021-04-26 17:37 ` [PATCH v5 cxl2.0-v3-doe 6/6] test/cdat: CXL CDAT test data Chris Browy

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