[Bug 1850378] Re: RISC-V unreliable IPIs

[Launchpad Bug Tracker <1850378@bugs.launchpad.net>]

[Expired for QEMU because there has been no activity for 60 days.]

** Changed in: qemu
       Status: Incomplete => Expired

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https://bugs.launchpad.net/bugs/1850378

Title:
  RISC-V unreliable IPIs

Status in QEMU:
  Expired

Bug description:
  I am working on a project with custom inter processor interrupts (IPIs) on the RISC-V virt machine.
  After upgrading from version 3.1.0 to 4.1.0 which fixes a related issue (https://github.com/riscv/riscv-qemu/issues/132) I am able to use the CPU hotplug feature.

  However, if I try to use IPIs for communication between two cores, the
  wfi instruction behaves strangely. Either it does not return, or it
  returns on timer interrupts, even though they are disabled. The code,
  I use on one core to wait for an interrupt is the following.

   csr_clear(sie, SIE_SEIE | SIE_STIE);
   do {
    wait_for_interrupt();
    sipval = csr_read(sip);
    sieval = csr_read(sie);
    scauseval = csr_read(scause) & 0xFF;
   /* only break if wfi returns for an software interrupt */
   } while ((sipval & sieval) == 0 && scauseval != 1);
   csr_set(sie, SIE_SEIE | SIE_STIE);

  Since the resulting sequence does not seem to be deterministic, my
  guess is, that it has something to do with the communication of qemu's
  threads for the different cores.

  Update:
  The exact same setup works fine in spike (the actual sim, not the qemu board), which might give a hint, that it is related to the interrupt controller implementation.

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