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Thu, 8 Jul 2021 05:12:05 +0000 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable In-Reply-To: <20210702173534.qy7yd4uievvhwave@habkost.net> References: <20210628132018.394994-1-pizhenwei@bytedance.com> <162508068941.526217.2563710865841096339@amd.com> <20210701104313.5b64a9b4@redhat.com> <162517174973.564224.1039189315728194554@amd.com> <2952f218-f391-36d5-6331-006d9312cc66@bytedance.com> <20210702154322.x2rwhcx7vwg226bx@amd.com> <20210702173534.qy7yd4uievvhwave@habkost.net> Subject: Re: [External] Re: [PATCH] target/i386: Fix cpuid level for AMD From: Michael Roth Cc: like.xu@linux.intel.com, armbru@redhat.com, wei.huang2@amd.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, zhenwei pi , Dr. David Alan Gilbert , babu.moger@amd.com, pbonzini@redhat.com, Igor Mammedov , philmd@redhat.com To: Eduardo Habkost Date: Thu, 08 Jul 2021 00:11:56 -0500 Message-ID: <162572111635.19908.4278294895739120232@amd.com> User-Agent: alot/0.9 X-ClientProxiedBy: SA0PR11CA0104.namprd11.prod.outlook.com (2603:10b6:806:d1::19) To CH2PR12MB4133.namprd12.prod.outlook.com (2603:10b6:610:7a::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost (76.251.165.188) by SA0PR11CA0104.namprd11.prod.outlook.com (2603:10b6:806:d1::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.19 via Frontend Transport; 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envelope-from=Michael.Roth@amd.com; helo=NAM02-DM3-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, MSGID_FROM_MTA_HEADER=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Quoting Eduardo Habkost (2021-07-02 12:35:34) > On Fri, Jul 02, 2021 at 10:43:22AM -0500, Michael Roth wrote: > > On Fri, Jul 02, 2021 at 01:14:56PM +0800, zhenwei pi wrote: > > > On 7/2/21 4:35 AM, Michael Roth wrote: > > > > Quoting Igor Mammedov (2021-07-01 03:43:13) > > > > > On Wed, 30 Jun 2021 14:18:09 -0500 > > > > > Michael Roth wrote: > > > > >=20 > > > > > > Quoting Dr. David Alan Gilbert (2021-06-29 09:06:02) > > > > > > > * zhenwei pi (pizhenwei@bytedance.com) wrote: > > > > > > > > A AMD server typically has cpuid level 0x10(test on Rome/Mi= lan), it > > > > > > > > should not be changed to 0x1f in multi-dies case. > > > > > > > >=20 > > > > > > > > Fixes: a94e1428991 (target/i386: Add CPUID.1F generation su= pport > > > > > > > > for multi-dies PCMachine) > > > > > > > > Signed-off-by: zhenwei pi > > > > > > >=20 > > > > > > > (Copying in Babu) > > > > > > >=20 > > > > > > > Hmm I think you're right. I've cc'd in Babu and Wei. > > > > > > >=20 > > > > > > > Eduardo: What do we need to do about compatibility, do we nee= d to wire > > > > > > > this to machine type or CPU version? > > > > > >=20 > > > > > > FWIW, there are some other CPUID entries like leaves 2 and 4 th= at are > > > > > > also Intel-specific. With SEV-SNP CPUID enforcement, advertisin= g them to > > > > > > guests will result in failures when host SNP firmware checks th= e > > > > > > hypervisor-provided CPUID values against the host-supported one= s. > > > > > >=20 > > > > > > To address this we've been planning to add an 'amd-cpuid-only' = property > > > > > > to suppress them: > > > > > >=20 > > > > > > https://github.com/mdroth/qemu/commit/28d0553fe748d30a8af09e= 5e58a7da3eff03e21b > > > > > >=20 > > > > > > My thinking is this property should be off by default, and only= defined > > > > > > either via explicit command-line option, or via new CPU types. = We're also > > > > > > planning to add new CPU versions for EPYC* CPU types that set t= his > > > > > > 'amd-cpuid-only' property by default: > > > > > >=20 > > > > > > https://github.com/mdroth/qemu/commits/new-cpu-types-upstrea= m > > > > > It look like having new cpu versions is enough to change behavior= , > > > > > maybe keep 'amd-cpuid-only' as internal field and not expose it t= o users > > > > > as a property. > > > >=20 > > > > Hmm, I defined it as a property mainly to make use of > > > > X86CPUVersionDefinition.props to create new versions of the CPU typ= es > > > > with those properties set. > > > >=20 > > > > There's a patch there that adds X86CPUVersionDefinition.cache_info = so > > > > that new cache definitions can be provided for new CPU versions. So > > > > would you suggest a similar approach here, e.g. adding an > > > > X86CPUVersionDefinition.amd_cpuid_only field that could be used dir= ectly > > > > rather than going through X86CPUVersionDefinition.props? > > > >=20 > > > > There's also another new "amd-xsave" prop in that series that does = something > > > > similar to "amd-cpuid-only", so a little worried about tacking to m= uch extra > > > > into X86CPUVersionDefinition. But maybe that one could just be roll= ed into > > > > "amd-cpuid-only" since it is basically fixing up xsave-related cpui= d > > > > entries for AMD... > > > >=20 > > > Hi, this patch wants to fix the issue: > > > AMD CPU (Rome/Milan) should get the cpuid level 0x10, not 0x1F in the= guest. > > > If QEMU reports a 0x1F to guest, guest(Linux) would use leaf 0x1F ins= tead of > > > leaf 0xB to get extended topology: > > >=20 > > > https://github.com/torvalds/linux/blob/master/arch/x86/kernel/cpu/top= ology.c#L49 > > >=20 > > > static int detect_extended_topology_leaf(struct cpuinfo_x86 *c) > > > { > > > if (c->cpuid_level >=3D 0x1f) { > > > if (check_extended_topology_leaf(0x1f) =3D=3D 0) > > > return 0x1f; > > > } > > >=20 > > > if (c->cpuid_level >=3D 0xb) { > > > if (check_extended_topology_leaf(0xb) =3D=3D 0) > > > return 0xb; > > > } > > >=20 > > > return -1; > > > } > > >=20 > > > Because of the wrong cpuid level, the guest gets unexpected topology = from > > > leaf 0x1F. > > >=20 > > > I tested https://github.com/mdroth/qemu/commits/new-cpu-types-upstrea= m, and > > > it seems that these patches could not fix this issue. > >=20 > > Yes, I think your patch would still be needed. The question is whether = it's > > okay to change it for existing CPU types, e.g. EPYC-Milan, or only for = new ones > > when they set a certain flag/property, like the proposed "amd-cpuid-onl= y" (which > > the proposed EPYC-Milan-v2 would set). >=20 > I tried to answer this in a separate reply in this thread, but > answering here for visibility: >=20 > You can safely do it on existing CPU types, because the new > behavior doesn't introduce host software or hardware requirements > when enabled. You just need to disable the new behavior in > MachineClass.compat_props for older machine types. Hi Eduardo, Thanks for the suggestions. Since the CPUID changes no longer rely on adding new CPU models, I've broken that out as a separate patch here based on your input: https://lists.nongnu.org/archive/html/qemu-devel/2021-07/msg01679.html Zhenwei, with the above patch I think you can change your patch to use: if (!cpu->vendor_cpuid_only || IS_INTEL_CPU(env)) //add intel-specific range Let me know if you want me to update and add to my series. >=20 > --=20 > Eduardo >=20 >