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Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190824184635.34192-8-mrolnik@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Mon, 26 Aug 2019 06:01:29 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-devel] [PATCH v29 7/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, philmd@redhat.com, dovgaluk@ispras.ru, imammedo@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Archived-At: List-Archive: On 24/08/2019 20.46, Michael Rolnik wrote: > Signed-off-by: Michael Rolnik > --- > MAINTAINERS | 6 ++++++ > arch_init.c | 2 ++ > configure | 7 +++++++ > default-configs/avr-softmmu.mak | 5 +++++ > include/disas/dis-asm.h | 6 ++++++ > include/sysemu/arch_init.h | 1 + > qapi/machine.json | 3 ++- > target/avr/Makefile.objs | 33 +++++++++++++++++++++++++++++++++ > tests/machine-none-test.c | 1 + > 9 files changed, 63 insertions(+), 1 deletion(-) > create mode 100644 default-configs/avr-softmmu.mak > create mode 100644 target/avr/Makefile.objs > > diff --git a/MAINTAINERS b/MAINTAINERS > index ef6c01084b..763370e6ff 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -163,6 +163,12 @@ S: Maintained > F: hw/arm/smmu* > F: include/hw/arm/smmu* > > +AVR TCG CPUs > +M: Michael Rolnik > +S: Maintained > +F: target/avr/ > +F: hw/avr/ > + > CRIS TCG CPUs > M: Edgar E. Iglesias > S: Maintained > diff --git a/arch_init.c b/arch_init.c > index 0a1531124c..fb308aa802 100644 > --- a/arch_init.c > +++ b/arch_init.c > @@ -85,6 +85,8 @@ int graphic_depth = 32; > #define QEMU_ARCH QEMU_ARCH_UNICORE32 > #elif defined(TARGET_XTENSA) > #define QEMU_ARCH QEMU_ARCH_XTENSA > +#elif defined(TARGET_AVR) > +#define QEMU_ARCH QEMU_ARCH_AVR > #endif > > const uint32_t arch_type = QEMU_ARCH; > diff --git a/configure b/configure > index e44e454c43..1dbecba329 100755 > --- a/configure > +++ b/configure > @@ -7510,6 +7510,10 @@ case "$target_name" in > target_compiler=$cross_cc_aarch64 > eval "target_compiler_cflags=\$cross_cc_cflags_${target_name}" > ;; > + avr) > + gdb_xml_files="avr-cpu.xml" Nit: Above line uses a tab instead of spaces. > + target_compiler=$cross_cc_avr > + ;; > cris) > target_compiler=$cross_cc_cris > ;; > @@ -7790,6 +7794,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do > disas_config "ARM_A64" > fi > ;; > + avr) > + disas_config "AVR" > + ;; > cris) > disas_config "CRIS" > ;; > diff --git a/default-configs/avr-softmmu.mak b/default-configs/avr-softmmu.mak > new file mode 100644 > index 0000000000..d1e1c28118 > --- /dev/null > +++ b/default-configs/avr-softmmu.mak > @@ -0,0 +1,5 @@ > +# Default configuration for avr-softmmu > + > +# Boards: > +# > +CONFIG_AVR_SAMPLE=y > diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h > index e9c7dd8eb4..8bedce17ac 100644 > --- a/include/disas/dis-asm.h > +++ b/include/disas/dis-asm.h > @@ -211,6 +211,12 @@ enum bfd_architecture > #define bfd_mach_m32r 0 /* backwards compatibility */ > bfd_arch_mn10200, /* Matsushita MN10200 */ > bfd_arch_mn10300, /* Matsushita MN10300 */ > + bfd_arch_avr, /* Atmel AVR microcontrollers. */ > +#define bfd_mach_avr1 1 > +#define bfd_mach_avr2 2 > +#define bfd_mach_avr3 3 > +#define bfd_mach_avr4 4 > +#define bfd_mach_avr5 5 > bfd_arch_cris, /* Axis CRIS */ > #define bfd_mach_cris_v0_v10 255 > #define bfd_mach_cris_v32 32 > diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h > index 62c6fe4cf1..893df26ce2 100644 > --- a/include/sysemu/arch_init.h > +++ b/include/sysemu/arch_init.h > @@ -24,6 +24,7 @@ enum { > QEMU_ARCH_NIOS2 = (1 << 17), > QEMU_ARCH_HPPA = (1 << 18), > QEMU_ARCH_RISCV = (1 << 19), > + QEMU_ARCH_AVR = (1 << 20), > }; > > extern const uint32_t arch_type; > diff --git a/qapi/machine.json b/qapi/machine.json > index de5c742d72..a82ba088f4 100644 > --- a/qapi/machine.json > +++ b/qapi/machine.json > @@ -21,11 +21,12 @@ > # is true even for "qemu-system-x86_64". > # > # ppcemb: dropped in 3.1 > +# avr: addin in 4.2 Please use "since 4.2" because that's the word that we use in most spots in the QAPI documentation. > # Since: 3.0 > ## > { 'enum' : 'SysEmuTarget', > - 'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32', > + 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm32', > 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64', > 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc', > 'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4', > diff --git a/target/avr/Makefile.objs b/target/avr/Makefile.objs > new file mode 100644 > index 0000000000..2976affd95 > --- /dev/null > +++ b/target/avr/Makefile.objs > @@ -0,0 +1,33 @@ > +# > +# QEMU AVR CPU > +# > +# Copyright (c) 2019 Michael Rolnik > +# > +# This library is free software; you can redistribute it and/or > +# modify it under the terms of the GNU Lesser General Public > +# License as published by the Free Software Foundation; either > +# version 2.1 of the License, or (at your option) any later version. > +# > +# This library is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > +# Lesser General Public License for more details. > +# > +# You should have received a copy of the GNU Lesser General Public > +# License along with this library; if not, see > +# > +# > + > +DECODETREE = $(SRC_PATH)/scripts/decodetree.py > +decode-y = $(SRC_PATH)/target/avr/insn.decode > + > +target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE) > + $(call quiet-command, \ > + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \ > + "GEN", $(TARGET_DIR)$@) > + > +target/avr/translate.o: target/avr/decode_insn.inc.c > + > +obj-y += translate.o cpu.o helper.o > +obj-y += gdbstub.o > +obj-$(CONFIG_SOFTMMU) += machine.o > diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c > index 5953d31755..3e5c74e73e 100644 > --- a/tests/machine-none-test.c > +++ b/tests/machine-none-test.c > @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = { > /* tested targets list */ > { "arm", "cortex-a15" }, > { "aarch64", "cortex-a57" }, > + { "avr", "avr6-avr-cpu" }, > { "x86_64", "qemu64,apic-id=0" }, > { "i386", "qemu32,apic-id=0" }, > { "alpha", "ev67" }, > Apart from the two small nits, the patch looks fine to me. Thomas