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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id z2sm2795356wma.45.2021.08.31.07.46.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Aug 2021 07:46:30 -0700 (PDT) Subject: Re: [PATCH v2] hw/arm/smmuv3: Simplify range invalidation To: "Liu, Renwei" , Peter Maydell References: <4FA89A717CD8094DBA0FE20FA5F98EAA010E6E9940@SHASXM03.verisilicon.com> From: Eric Auger Message-ID: <1805dcb3-6f99-0bf1-2d73-be0537c98512@redhat.com> Date: Tue, 31 Aug 2021 16:46:29 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <4FA89A717CD8094DBA0FE20FA5F98EAA010E6E9940@SHASXM03.verisilicon.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=eric.auger@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-Language: en-US Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.391, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.932, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Cc: "qemu-arm@nongnu.org" , "Wen, Jianxian" , "qemu-devel@nongnu.org" , "Li, Chunming" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Liu, On 8/23/21 9:50 AM, Liu, Renwei wrote: > Simplify range invalidation which can avoid to iterate over all > iotlb entries multi-times. For instance invalidations patterns like > "invalidate 32 4kB pages starting from 0xffacd000" need to iterate over > all iotlb entries 6 times (num_pages: 1, 2, 16, 8, 4, 1). It only needs > to iterate over all iotlb entries once with new implementation. This wouldn't work. This reverts commit 6d9cd115b9df ("hw/arm/smmuv3: Enforce invalidation on a power of two range") which is mandated for VFIO and virtio to work. IOTLB invalidations must be naturally aligned and with a power of 2 range, hence this iteration. Thanks Eric > > Signed-off-by: Renwei Liu > --- > v2: > - Remove file mode change. > > hw/arm/smmu-common.c | 6 +++--- > hw/arm/smmu-internal.h | 2 +- > hw/arm/smmuv3.c | 22 ++++------------------ > 3 files changed, 8 insertions(+), 22 deletions(-) > > diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c > index 0459850a93..ccb085f83c 100644 > --- a/hw/arm/smmu-common.c > +++ b/hw/arm/smmu-common.c > @@ -142,8 +142,8 @@ static gboolean smmu_hash_remove_by_asid_iova(gpointer key, gpointer value, > if (info->asid >= 0 && info->asid != SMMU_IOTLB_ASID(iotlb_key)) { > return false; > } > - return ((info->iova & ~entry->addr_mask) == entry->iova) || > - ((entry->iova & ~info->mask) == info->iova); > + return (entry->iova >= info->iova) && > + ((entry->iova + entry->addr_mask) < (info->iova + info->range)); > } > > inline void > @@ -167,7 +167,7 @@ smmu_iotlb_inv_iova(SMMUState *s, int asid, dma_addr_t iova, > > SMMUIOTLBPageInvInfo info = { > .asid = asid, .iova = iova, > - .mask = (num_pages * 1 << granule) - 1}; > + .range = num_pages * 1 << granule}; > > g_hash_table_foreach_remove(s->iotlb, > smmu_hash_remove_by_asid_iova, > diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h > index 2d75b31953..f0e3a777af 100644 > --- a/hw/arm/smmu-internal.h > +++ b/hw/arm/smmu-internal.h > @@ -101,7 +101,7 @@ uint64_t iova_level_offset(uint64_t iova, int inputsize, > typedef struct SMMUIOTLBPageInvInfo { > int asid; > uint64_t iova; > - uint64_t mask; > + uint64_t range; > } SMMUIOTLBPageInvInfo; > > typedef struct SMMUSIDRange { > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c > index 01b60bee49..0b009107d1 100644 > --- a/hw/arm/smmuv3.c > +++ b/hw/arm/smmuv3.c > @@ -857,7 +857,7 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova, > > static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd) > { > - dma_addr_t end, addr = CMD_ADDR(cmd); > + dma_addr_t addr = CMD_ADDR(cmd); > uint8_t type = CMD_TYPE(cmd); > uint16_t vmid = CMD_VMID(cmd); > uint8_t scale = CMD_SCALE(cmd); > @@ -866,7 +866,6 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd) > bool leaf = CMD_LEAF(cmd); > uint8_t tg = CMD_TG(cmd); > uint64_t num_pages; > - uint8_t granule; > int asid = -1; > > if (type == SMMU_CMD_TLBI_NH_VA) { > @@ -880,23 +879,10 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd) > return; > } > > - /* RIL in use */ > - > num_pages = (num + 1) * BIT_ULL(scale); > - granule = tg * 2 + 10; > - > - /* Split invalidations into ^2 range invalidations */ > - end = addr + (num_pages << granule) - 1; > - > - while (addr != end + 1) { > - uint64_t mask = dma_aligned_pow2_mask(addr, end, 64); > - > - num_pages = (mask + 1) >> granule; > - trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf); > - smmuv3_inv_notifiers_iova(s, asid, addr, tg, num_pages); > - smmu_iotlb_inv_iova(s, asid, addr, tg, num_pages, ttl); > - addr += mask + 1; > - } > + trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf); > + smmuv3_inv_notifiers_iova(s, asid, addr, tg, num_pages); > + smmu_iotlb_inv_iova(s, asid, addr, tg, num_pages, ttl); > } > > static gboolean