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From: James Hogan <james.hogan@imgtec.com>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH 07/15] tcg-mips: Adjust qemu_ld/st for mips64
Date: Wed, 10 Feb 2016 16:34:39 +0000	[thread overview]
Message-ID: <20160210163439.GI3678@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <1455014403-10742-8-git-send-email-rth@twiddle.net>

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Hi Richard,

On Tue, Feb 09, 2016 at 09:39:55PM +1100, Richard Henderson wrote:
> @@ -1212,11 +1237,24 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl,
>             : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write));
>      int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
>  
> -    tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addrl,
> -                   TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
> -    tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0,
> -                    (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
> -    tcg_out_opc_reg(s, OPC_ADDU, TCG_REG_A0, TCG_REG_A0, TCG_AREG0);
> +    if (use_mips32r2_instructions) {
> +        if (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32) {
> +            tcg_out_opc_bf(s, OPC_EXT, TCG_REG_A0, addrl,
> +                           TARGET_PAGE_BITS + CPU_TLB_ENTRY_BITS - 1,
> +                           CPU_TLB_ENTRY_BITS);
> +        } else {
> +            tcg_out_opc_bf64(s, OPC_DEXT, OPC_DEXTM, OPC_DEXTU,
> +                             TCG_REG_A0, addrl,
> +                             TARGET_PAGE_BITS + CPU_TLB_ENTRY_BITS - 1,
> +                             CPU_TLB_ENTRY_BITS);
> +        }

The ext/dext here will end up with bits below bit CPU_TLB_ENTRY_BITS
set, which will result in load of addend from slightly offset address,
so things go badly wrong. You still need to either ANDI off the low bits
or trim them off with the ext/dext and shift it left again.

So I don't think there's any benefit to the use of these instructions
unless CPU_TLB_SIZE + CPU_TLB_ENTRY_BITS exceeds the 16-bits available
in the ANDI immediate field for the non r2 case.

Cheers
James

> +    } else {
> +        tcg_out_opc_sa(s, ALIAS_TSRL, TCG_REG_A0, addrl,
> +                       TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
> +        tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0,
> +                        (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
> +    }
> +    tcg_out_opc_reg(s, ALIAS_PADD, TCG_REG_A0, TCG_REG_A0, TCG_AREG0);
>  
>      /* Compensate for very large offsets.  */
>      if (add_off >= 0x8000) {

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  reply	other threads:[~2016-02-10 16:35 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-09 10:39 [Qemu-devel] [PATCH 00/15] tcg mips64 and mipsr6 improvements Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 01/15] tcg-mips: Add mips64 opcodes Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 02/15] tcg-mips: Support 64-bit opcodes Richard Henderson
2016-02-09 15:24   ` James Hogan
2016-02-09 17:16     ` Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 03/15] tcg-mips: Adjust move functions for mips64 Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 04/15] tcg-mips: Adjust load/store " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 05/15] tcg-mips: Adjust prologue " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 06/15] tcg-mips: Add tcg unwind info Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 07/15] tcg-mips: Adjust qemu_ld/st for mips64 Richard Henderson
2016-02-10 16:34   ` James Hogan [this message]
2016-02-10 17:35     ` Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 08/15] tcg-mips: Adjust calling conventions " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 09/15] tcg-mips: Fix exit_tb " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 10/15] tcg-mips: Move bswap code to subroutines Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 11/15] tcg-mips: Use mips64r6 instructions in tcg_out_movi Richard Henderson
2016-02-09 16:50   ` James Hogan
2016-02-09 17:20     ` Richard Henderson
2016-02-09 17:25     ` Richard Henderson
2016-02-10  0:32     ` James Hogan
2016-02-09 10:40 ` [Qemu-devel] [PATCH 12/15] tcg-mips: Use mips64r6 instructions in tcg_out_ldst Richard Henderson
2016-02-09 10:40 ` [Qemu-devel] [PATCH 13/15] tcg-mips: Use mips64r6 instructions in constant addition Richard Henderson
2016-02-09 10:40 ` [Qemu-devel] [PATCH 14/15] tcg-mips: Use mipsr6 instructions in branches Richard Henderson
2016-02-09 16:22   ` James Hogan
2016-02-09 17:13     ` Richard Henderson
2016-02-09 18:46       ` Maciej W. Rozycki
2016-02-10  0:20     ` James Hogan
2016-02-09 10:40 ` [Qemu-devel] [PATCH 15/15] tcg-mips: Use mipsr6 instructions in calls Richard Henderson
2016-02-10 12:49   ` James Hogan

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