From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v3b 16/18] target/arm: Implement FDUP/DUP
Date: Wed, 30 May 2018 11:01:18 -0700 [thread overview]
Message-ID: <20180530180120.13355-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180530180120.13355-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-sve.c | 37 +++++++++++++++++++++++++++++++++++++
target/arm/sve.decode | 8 ++++++++
2 files changed, 45 insertions(+)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 75eb36f110..e470f3b745 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -3183,6 +3183,43 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a, uint32_t insn)
return true;
}
+/*
+ *** SVE Integer Wide Immediate - Unpredicated Group
+ */
+
+static bool trans_FDUP(DisasContext *s, arg_FDUP *a, uint32_t insn)
+{
+ if (a->esz == 0) {
+ return false;
+ }
+ if (sve_access_check(s)) {
+ unsigned vsz = vec_full_reg_size(s);
+ int dofs = vec_full_reg_offset(s, a->rd);
+ uint64_t imm;
+
+ /* Decode the VFP immediate. */
+ imm = vfp_expand_imm(a->esz, a->imm);
+ imm = dup_const(a->esz, imm);
+
+ tcg_gen_gvec_dup64i(dofs, vsz, vsz, imm);
+ }
+ return true;
+}
+
+static bool trans_DUP_i(DisasContext *s, arg_DUP_i *a, uint32_t insn)
+{
+ if (a->esz == 0 && extract32(insn, 13, 1)) {
+ return false;
+ }
+ if (sve_access_check(s)) {
+ unsigned vsz = vec_full_reg_size(s);
+ int dofs = vec_full_reg_offset(s, a->rd);
+
+ tcg_gen_gvec_dup64i(dofs, vsz, vsz, dup_const(a->esz, a->imm));
+ }
+ return true;
+}
+
/*
*** SVE Memory - 32-bit Gather and Unsized Contiguous Group
*/
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 4b718060a9..b8bd22aff7 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -614,6 +614,14 @@ CTERM 00100101 1 sf:1 1 rm:5 001000 rn:5 ne:1 0000
# SVE integer compare scalar count and limit
WHILE 00100101 esz:2 1 rm:5 000 sf:1 u:1 1 rn:5 eq:1 rd:4
+### SVE Integer Wide Immediate - Unpredicated Group
+
+# SVE broadcast floating-point immediate (unpredicated)
+FDUP 00100101 esz:2 111 00 1110 imm:8 rd:5
+
+# SVE broadcast integer immediate (unpredicated)
+DUP_i 00100101 esz:2 111 00 011 . ........ rd:5 imm=%sh8_i8s
+
### SVE Memory - 32-bit Gather and Unsized Contiguous Group
# SVE load predicate register
--
2.17.0
next prev parent reply other threads:[~2018-05-30 18:01 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-30 18:01 [Qemu-devel] [PATCH v3b 00/18] target/arm: SVE instructions, part 2 Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 01/18] target/arm: Extend vec_reg_offset to larger sizes Richard Henderson
2018-06-04 16:47 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 02/18] target/arm: Implement SVE Permute - Unpredicated Group Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 03/18] target/arm: Implement SVE Permute - Predicates Group Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 04/18] target/arm: Implement SVE Permute - Interleaving Group Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 05/18] target/arm: Implement SVE compress active elements Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 06/18] target/arm: Implement SVE conditionally broadcast/extract element Richard Henderson
2018-06-04 16:46 ` Peter Maydell
2018-06-13 1:02 ` Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 07/18] target/arm: Implement SVE copy to vector (predicated) Richard Henderson
2018-06-04 16:51 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 08/18] target/arm: Implement SVE reverse within elements Richard Henderson
2018-06-04 16:56 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 09/18] target/arm: Implement SVE vector splice (predicated) Richard Henderson
2018-06-04 17:08 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 10/18] target/arm: Implement SVE Select Vectors Group Richard Henderson
2018-06-04 17:12 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 11/18] target/arm: Implement SVE Integer Compare - " Richard Henderson
2018-06-04 17:30 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 12/18] target/arm: Implement SVE Integer Compare - Immediate Group Richard Henderson
2018-06-04 17:36 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 13/18] target/arm: Implement SVE Partition Break Group Richard Henderson
2018-06-05 17:10 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 14/18] target/arm: Implement SVE Predicate Count Group Richard Henderson
2018-06-05 17:27 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 15/18] target/arm: Implement SVE Integer Compare - Scalars Group Richard Henderson
2018-06-05 18:02 ` Peter Maydell
2018-06-13 1:27 ` Richard Henderson
2018-05-30 18:01 ` Richard Henderson [this message]
2018-06-05 18:05 ` [Qemu-devel] [PATCH v3b 16/18] target/arm: Implement FDUP/DUP Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 17/18] target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group Richard Henderson
2018-06-07 8:54 ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 18/18] target/arm: Implement SVE Floating Point Arithmetic " Richard Henderson
2018-06-07 10:45 ` Peter Maydell
2018-06-07 16:41 ` Richard Henderson
2018-05-30 18:23 ` [Qemu-devel] [PATCH v3b 00/18] target/arm: SVE instructions, part 2 no-reply
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