From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30A52C0650E for ; Wed, 3 Jul 2019 09:07:38 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 090312189E for ; Wed, 3 Jul 2019 09:07:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 090312189E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33910 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hibEn-0005ZL-3M for qemu-devel@archiver.kernel.org; Wed, 03 Jul 2019 05:07:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51790) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hiaqB-0006Y9-7l for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:42:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hiaq6-0008IZ-Tg for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:42:11 -0400 Received: from mail-lf1-f53.google.com ([209.85.167.53]:38083) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hiaq6-0007YK-GO for qemu-devel@nongnu.org; Wed, 03 Jul 2019 04:42:06 -0400 Received: by mail-lf1-f53.google.com with SMTP id b11so1160687lfa.5 for ; Wed, 03 Jul 2019 01:41:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:cc:from:to; bh=/3ducq0eP8I5aPrZO6qPfK+y5RApmcrkJq95TSYVf1E=; b=Vl7R8tjtKEeqfAB3TifOlVw/cu7aIgTEjTi7n6R6TPx6FhudKp4Jp4kkDR/PHEbZEG FRsGc69BzrMFT/Yx5t6E/GkPXBLyLmxiGM1Yz/i9wOr7jvzpH/TRtJUTqYQXG7EC9uNq rqNdpxKKs7q5VxWS4yeXp9uiq8kedlVmhdIqFJDIW5i/Sanzi/jlTT1LbD6ucL5yjbDK GjBqBf4dr/DmXnqNEdLsGbUQnQ/jQGSi9qAQyQhuLDTslNJXZQnH2cx4Vzz3L6uHB6Gy wdbw8WBqmjWquz95mUk9kz1Z+XjLBncX3ThElynd3fAQ9/vWhzKBIf6xC8NiwJqydlXd OjBw== X-Gm-Message-State: APjAAAWtPkKa5Oc7vG46V4cZ96mefQRWatlvPvx5eK6YAZz+tXnmQelR LB5mTcYCkWwqXMD3HZkNsCKUjYknSadI5g== X-Google-Smtp-Source: APXvYqxoAgq0YYa89zjoETfM2w/HxYniRuVbFU5pIzg4h3H1o/EhwOJdT5JApCUV6GHLMklwaLSPLQ== X-Received: by 2002:a19:4a50:: with SMTP id x77mr3730778lfa.91.1562143308293; Wed, 03 Jul 2019 01:41:48 -0700 (PDT) Received: from localhost ([134.17.27.127]) by smtp.gmail.com with ESMTPSA id u13sm291020lfi.4.2019.07.03.01.41.47 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 01:41:47 -0700 (PDT) Date: Wed, 3 Jul 2019 01:40:38 -0700 Message-Id: <20190703084048.6980-23-palmer@sifive.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703084048.6980-1-palmer@sifive.com> References: <20190703084048.6980-1-palmer@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.167.53 Subject: [Qemu-devel] [PULL 22/32] RISC-V: Add support for the Zicsr extension X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The various CSR instructions have been split out of the base ISA as part of the ratification process. This patch adds a Zicsr argument, which disables all the CSR instructions. Signed-off-by: Palmer Dabbelt Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 1 + target/riscv/cpu.h | 1 + target/riscv/csr.c | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index bbad39a337b3..915b9e77df33 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -442,6 +442,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true), DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true), DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true), + DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index ba551cd3082c..0adb307f3298 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -224,6 +224,7 @@ typedef struct RISCVCPU { bool ext_u; bool ext_counters; bool ext_ifencei; + bool ext_icsr; char *priv_spec; char *user_spec; diff --git a/target/riscv/csr.c b/target/riscv/csr.c index de67741f3648..e0d45867607a 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -793,6 +793,7 @@ int riscv_csrrw(CPURISCVState *env, int csrno, target_ulong *ret_value, { int ret; target_ulong old_value; + RISCVCPU *cpu = env_archcpu(env); /* check privileges and return -1 if check fails */ #if !defined(CONFIG_USER_ONLY) @@ -803,6 +804,11 @@ int riscv_csrrw(CPURISCVState *env, int csrno, target_ulong *ret_value, } #endif + /* ensure the CSR extension is enabled. */ + if (!cpu->cfg.ext_icsr) { + return -1; + } + /* check predicate */ if (!csr_ops[csrno].predicate || csr_ops[csrno].predicate(env, csrno) < 0) { return -1; -- 2.21.0