From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Riku Voipio" <riku.voipio@iki.fi>,
aaron@os.amperecomputing.com, cota@braap.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
bobby.prani@gmail.com, "Alex Bennée" <alex.bennee@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v4 22/54] atomic_template: add inline trace/plugin helpers
Date: Wed, 31 Jul 2019 17:06:47 +0100 [thread overview]
Message-ID: <20190731160719.11396-23-alex.bennee@linaro.org> (raw)
In-Reply-To: <20190731160719.11396-1-alex.bennee@linaro.org>
From: "Emilio G. Cota" <cota@braap.org>
In preparation for plugin support.
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v4
- move common stuff to atomic_common.inc.c
- fix ups for widened uint16_t info
- drop haddr in helpers
- fix wide lines
---
accel/tcg/atomic_common.inc.c | 50 +++++++++++++++++++
accel/tcg/atomic_template.h | 93 +++++++++++++++++++++--------------
accel/tcg/cputlb.c | 2 +
accel/tcg/user-exec.c | 2 +
4 files changed, 111 insertions(+), 36 deletions(-)
create mode 100644 accel/tcg/atomic_common.inc.c
diff --git a/accel/tcg/atomic_common.inc.c b/accel/tcg/atomic_common.inc.c
new file mode 100644
index 00000000000..a86098fb2de
--- /dev/null
+++ b/accel/tcg/atomic_common.inc.c
@@ -0,0 +1,50 @@
+/*
+ * Common Atomic Helper Functions
+ *
+ * This file should be included before the various instantiations of
+ * the atomic_template.h helpers.
+ *
+ * Copyright (c) 2019 Linaro
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+static inline
+void atomic_trace_rmw_pre(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+ CPUState *cpu = env_cpu(env);
+
+ trace_guest_mem_before_exec(cpu, addr, info);
+ trace_guest_mem_before_exec(cpu, addr, info | TRACE_MEM_ST);
+}
+
+static inline void
+atomic_trace_rmw_post(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+}
+
+static inline
+void atomic_trace_ld_pre(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+ trace_guest_mem_before_exec(env_cpu(env), addr, info);
+}
+
+static inline
+void atomic_trace_ld_post(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+}
+
+static inline
+void atomic_trace_st_pre(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+ trace_guest_mem_before_exec(env_cpu(env), addr, info);
+}
+
+static inline
+void atomic_trace_st_post(CPUArchState *env, target_ulong addr, uint16_t info)
+{
+}
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 53899bbbc21..34f891d4a62 100644
--- a/accel/tcg/atomic_template.h
+++ b/accel/tcg/atomic_template.h
@@ -59,26 +59,6 @@
# define ABI_TYPE uint32_t
#endif
-#define ATOMIC_TRACE_RMW do { \
- uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, ATOMIC_MMU_IDX); \
- \
- trace_guest_mem_before_exec(env_cpu(env), addr, info); \
- trace_guest_mem_before_exec(env_cpu(env), addr, \
- info | TRACE_MEM_ST); \
- } while (0)
-
-#define ATOMIC_TRACE_LD do { \
- uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, ATOMIC_MMU_IDX); \
- \
- trace_guest_mem_before_exec(env_cpu(env), addr, info); \
- } while (0)
-
-# define ATOMIC_TRACE_ST do { \
- uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true, ATOMIC_MMU_IDX); \
- \
- trace_guest_mem_before_exec(env_cpu(env), addr, info); \
- } while (0)
-
/* Define host-endian atomic operations. Note that END is used within
the ATOMIC_NAME macro, and redefined below. */
#if DATA_SIZE == 1
@@ -98,14 +78,17 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
DATA_TYPE ret;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_RMW;
+ atomic_trace_rmw_pre(env, addr, info);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, cmpv, newv);
#else
ret = atomic_cmpxchg__nocheck(haddr, cmpv, newv);
#endif
ATOMIC_MMU_CLEANUP;
+ atomic_trace_rmw_post(env, addr, info);
return ret;
}
@@ -115,10 +98,13 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS)
{
ATOMIC_MMU_DECLS;
DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_LD;
+ atomic_trace_ld_pre(env, addr, info);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
+ atomic_trace_ld_post(env, addr, info);
return val;
}
@@ -127,10 +113,13 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr,
{
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_ST;
+ atomic_trace_st_pre(env, addr, info);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
+ atomic_trace_st_post(env, addr, info);
}
#endif
#else
@@ -140,10 +129,13 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr,
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
DATA_TYPE ret;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_RMW;
+ atomic_trace_rmw_pre(env, addr, info);
ret = atomic_xchg__nocheck(haddr, val);
ATOMIC_MMU_CLEANUP;
+ atomic_trace_rmw_post(env, addr, info);
return ret;
}
@@ -154,10 +146,14 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
ATOMIC_MMU_DECLS; \
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
DATA_TYPE ret; \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \
+ false, \
+ ATOMIC_MMU_IDX); \
\
- ATOMIC_TRACE_RMW; \
+ atomic_trace_rmw_pre(env, addr, info); \
ret = atomic_##X(haddr, val); \
ATOMIC_MMU_CLEANUP; \
+ atomic_trace_rmw_post(env, addr, info); \
return ret; \
}
@@ -186,8 +182,11 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
ATOMIC_MMU_DECLS; \
XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
XDATA_TYPE cmp, old, new, val = xval; \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \
+ false, \
+ ATOMIC_MMU_IDX); \
\
- ATOMIC_TRACE_RMW; \
+ atomic_trace_rmw_pre(env, addr, info); \
smp_mb(); \
cmp = atomic_read__nocheck(haddr); \
do { \
@@ -195,6 +194,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
cmp = atomic_cmpxchg__nocheck(haddr, old, new); \
} while (cmp != old); \
ATOMIC_MMU_CLEANUP; \
+ atomic_trace_rmw_post(env, addr, info); \
return RET; \
}
@@ -232,14 +232,18 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
DATA_TYPE ret;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT,
+ false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_RMW;
+ atomic_trace_rmw_pre(env, addr, info);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, BSWAP(cmpv), BSWAP(newv));
#else
ret = atomic_cmpxchg__nocheck(haddr, BSWAP(cmpv), BSWAP(newv));
#endif
ATOMIC_MMU_CLEANUP;
+ atomic_trace_rmw_post(env, addr, info);
return BSWAP(ret);
}
@@ -249,10 +253,14 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS)
{
ATOMIC_MMU_DECLS;
DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT,
+ false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_LD;
+ atomic_trace_ld_pre(env, addr, info);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
+ atomic_trace_ld_post(env, addr, info);
return BSWAP(val);
}
@@ -261,11 +269,16 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr,
{
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT,
+ true,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_ST;
+ val = BSWAP(val);
+ atomic_trace_st_pre(env, addr, info);
val = BSWAP(val);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
+ atomic_trace_st_post(env, addr, info);
}
#endif
#else
@@ -275,10 +288,14 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr,
ATOMIC_MMU_DECLS;
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
ABI_TYPE ret;
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT,
+ false,
+ ATOMIC_MMU_IDX);
- ATOMIC_TRACE_RMW;
+ atomic_trace_rmw_pre(env, addr, info);
ret = atomic_xchg__nocheck(haddr, BSWAP(val));
ATOMIC_MMU_CLEANUP;
+ atomic_trace_rmw_post(env, addr, info);
return BSWAP(ret);
}
@@ -289,10 +306,14 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
ATOMIC_MMU_DECLS; \
DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
DATA_TYPE ret; \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \
+ false, \
+ ATOMIC_MMU_IDX); \
\
- ATOMIC_TRACE_RMW; \
+ atomic_trace_rmw_pre(env, addr, info); \
ret = atomic_##X(haddr, BSWAP(val)); \
ATOMIC_MMU_CLEANUP; \
+ atomic_trace_rmw_post(env, addr, info); \
return BSWAP(ret); \
}
@@ -319,8 +340,11 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
ATOMIC_MMU_DECLS; \
XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
XDATA_TYPE ldo, ldn, old, new, val = xval; \
+ uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \
+ false, \
+ ATOMIC_MMU_IDX); \
\
- ATOMIC_TRACE_RMW; \
+ atomic_trace_rmw_pre(env, addr, info); \
smp_mb(); \
ldn = atomic_read__nocheck(haddr); \
do { \
@@ -328,6 +352,7 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
ldn = atomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new)); \
} while (ldo != ldn); \
ATOMIC_MMU_CLEANUP; \
+ atomic_trace_rmw_post(env, addr, info); \
return RET; \
}
@@ -355,10 +380,6 @@ GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new)
#undef MEND
#endif /* DATA_SIZE > 1 */
-#undef ATOMIC_TRACE_ST
-#undef ATOMIC_TRACE_LD
-#undef ATOMIC_TRACE_RMW
-
#undef BSWAP
#undef ABI_TYPE
#undef DATA_TYPE
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 21ba71ea9dd..e4ac06041a2 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1701,6 +1701,8 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
} while (0)
#define ATOMIC_MMU_IDX oi
+#include "atomic_common.inc.c"
+
#define DATA_SIZE 1
#include "atomic_template.h"
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index bff1934cf1b..1c8aee943dc 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -724,6 +724,8 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
#define EXTRA_ARGS
+#include "atomic_common.inc.c"
+
#define DATA_SIZE 1
#include "atomic_template.h"
--
2.20.1
next prev parent reply other threads:[~2019-07-31 16:46 UTC|newest]
Thread overview: 107+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 16:06 [Qemu-devel] [PATCH v4 00/54] plugins for TCG Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 01/54] target/arm: handle M-profile semihosting at translate time Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 02/54] target/arm: handle A-profile T32 " Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 03/54] target/arm: handle A-profile A32 " Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 04/54] target/arm: remove run time semihosting checks Alex Bennée
2019-08-01 13:27 ` Aaron Lindsay OS via Qemu-devel
2019-08-01 13:36 ` Peter Maydell
2019-08-01 14:53 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 05/54] includes: remove stale [smp|max]_cpus externs Alex Bennée
2019-08-01 14:54 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 06/54] trace: expand mem_info:size_shift to 4 bits Alex Bennée
2019-08-01 15:01 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 07/54] trace: add mmu_index to mem_info Alex Bennée
2019-08-01 15:17 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 08/54] tcg/README: fix typo s/afterwise/afterwards/ Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 09/54] cpu: introduce cpu_in_exclusive_context() Alex Bennée
2019-08-01 15:23 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 10/54] translate-all: use cpu_in_exclusive_work_context() in tb_flush Alex Bennée
2019-08-01 15:25 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 11/54] docs/devel: add plugins.rst design document Alex Bennée
2019-08-01 15:31 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 12/54] configure: add --enable-plugins (MOVE TO END) Alex Bennée
2019-08-01 15:33 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 13/54] plugin: add user-facing API Alex Bennée
2019-08-01 15:39 ` Richard Henderson
2019-08-02 18:25 ` Aaron Lindsay OS via Qemu-devel
2019-09-06 19:31 ` Alex Bennée
2019-09-10 16:24 ` Aaron Lindsay OS via Qemu-devel
2019-09-10 17:41 ` Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 14/54] plugin: add core code Alex Bennée
2019-08-01 15:58 ` Richard Henderson
2019-09-12 9:17 ` Daniel P. Berrangé
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 15/54] plugin: add implementation of the api Alex Bennée
2019-08-01 16:14 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 16/54] queue: add QTAILQ_REMOVE_SEVERAL Alex Bennée
2019-08-01 16:16 ` Richard Henderson
2019-08-01 16:16 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 17/54] cputlb: document get_page_addr_code Alex Bennée
2019-08-01 17:08 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 18/54] cputlb: introduce get_page_addr_code_hostp Alex Bennée
2019-08-01 17:10 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 19/54] tcg: add tcg_gen_st_ptr Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 20/54] plugin-gen: add module for TCG-related code Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 21/54] atomic_template: fix indentation in GEN_ATOMIC_HELPER Alex Bennée
2019-07-31 16:06 ` Alex Bennée [this message]
2019-08-01 18:23 ` [Qemu-devel] [PATCH v4 22/54] atomic_template: add inline trace/plugin helpers Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 23/54] tcg: let plugins instrument virtual memory accesses Alex Bennée
2019-08-01 18:29 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 24/54] plugins: implement helpers for resolving hwaddr Alex Bennée
2019-08-01 14:14 ` Aaron Lindsay OS via Qemu-devel
2019-08-01 18:37 ` Richard Henderson
2019-10-09 17:45 ` Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 25/54] translate-all: notify plugin code of tb_flush Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 26/54] *-user: notify plugin of exit Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 27/54] *-user: plugin syscalls Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 28/54] cpu: hook plugin vcpu events Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 29/54] plugin-gen: add plugin_insn_append Alex Bennée
2019-08-01 18:39 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 30/54] translator: add translator_ld{ub, sw, uw, l, q} Alex Bennée
2019-08-01 19:24 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 31/54] target/arm: fetch code with translator_ld Alex Bennée
2019-08-01 19:26 ` Richard Henderson
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 32/54] target/ppc: " Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 33/54] target/sh4: " Alex Bennée
2019-07-31 16:06 ` [Qemu-devel] [PATCH v4 34/54] target/i386: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 35/54] target/hppa: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 36/54] target/m68k: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 37/54] target/alpha: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 38/54] target/riscv: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 39/54] target/sparc: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 40/54] target/xtensa: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 41/54] target/openrisc: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 42/54] translator: inject instrumentation from plugins Alex Bennée
2019-08-01 19:35 ` Richard Henderson
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 43/54] plugin: add API symbols to qemu-plugins.symbols Alex Bennée
2019-08-01 19:42 ` Richard Henderson
2019-10-11 16:46 ` Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 44/54] vl: support -plugin option Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 45/54] linux-user: " Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 46/54] tests/plugin: add sample plugins Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 47/54] tests/tcg: enable plugin testing Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 48/54] tests/plugin: add a hotblocks plugin Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 49/54] plugin: add qemu_plugin_insn_disas helper Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 50/54] tests/plugin: add instruction execution breakdown Alex Bennée
2019-08-01 14:31 ` Aaron Lindsay OS via Qemu-devel
2019-10-09 18:49 ` Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 51/54] tests/plugin: add hotpages plugin to breakdown memory access patterns Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 52/54] accel/stubs: reduce headers from tcg-stub Alex Bennée
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 53/54] include/exec: wrap cpu_ldst.h in CONFIG_TCG Alex Bennée
2019-08-01 19:51 ` Richard Henderson
2019-07-31 16:07 ` [Qemu-devel] [PATCH v4 54/54] include/exec/cpu-defs.h: fix typo Alex Bennée
2019-07-31 17:00 ` [Qemu-devel] [PATCH v4 00/54] plugins for TCG no-reply
2019-08-01 4:19 ` Markus Armbruster
2019-09-06 19:52 ` Alex Bennée
2019-09-10 16:16 ` Aaron Lindsay OS via Qemu-devel
2019-09-10 17:37 ` Alex Bennée
2019-09-10 16:34 ` Peter Maydell
2019-09-12 6:46 ` [Qemu-devel] TCG plugins and the GPL (was: [PATCH v4 00/54] plugins for TCG) Markus Armbruster
2019-09-12 9:03 ` Alex Bennée
2019-09-12 9:21 ` Peter Maydell
2019-09-12 10:07 ` Alex Bennée
2019-09-12 10:16 ` Daniel P. Berrangé
2019-09-12 10:21 ` Peter Maydell
2019-09-12 10:18 ` Peter Maydell
2019-09-12 10:35 ` Alex Bennée
2019-09-12 9:32 ` Daniel P. Berrangé
2019-08-01 14:20 ` [Qemu-devel] [PATCH v4 00/54] plugins for TCG no-reply
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