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From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>,
	Janosch Frank <frankja@linux.ibm.com>,
	David Hildenbrand <david@redhat.com>,
	Cornelia Huck <cohuck@redhat.com>,
	Halil Pasic <pasic@linux.ibm.com>,
	Christian Borntraeger <borntraeger@de.ibm.com>,
	qemu-s390x@nongnu.org, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH-for-4.2 v1 1/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug()
Date: Mon, 12 Aug 2019 13:27:32 +0200	[thread overview]
Message-ID: <20190812112737.6652-2-david@redhat.com> (raw)
In-Reply-To: <20190812112737.6652-1-david@redhat.com>

Let's select the ASC before calling the function. This is a prepararion
to remove the ASC magic depending on the access mode from mmu_translate.

There is currently no way to distinguish if we have code or data access.
For now, we were using code access, because especially when debugging with
the gdbstub, we want to read and disassemble what we single-step.

Signed-off-by: David Hildenbrand <david@redhat.com>
---
 target/s390x/helper.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 13ae9909ad..c5fb8966b6 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -58,6 +58,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
         vaddr &= 0x7fffffff;
     }
 
+    /* We want to read the code (e.g., see what we are single-stepping).*/
+    if (asc != PSW_ASC_HOME) {
+        asc = PSW_ASC_PRIMARY;
+    }
+
     if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, false)) {
         return -1;
     }
-- 
2.21.0



  reply	other threads:[~2019-08-12 11:28 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 11:27 [Qemu-devel] [PATCH-for-4.2 v1 0/6] s390x/mmu: Storage key reference and change bit handling David Hildenbrand
2019-08-12 11:27 ` David Hildenbrand [this message]
2019-08-12 15:18   ` [Qemu-devel] [qemu-s390x] [PATCH-for-4.2 v1 1/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() Thomas Huth
2019-08-12 15:28     ` David Hildenbrand
2019-08-12 15:39       ` David Hildenbrand
2019-08-12 16:04         ` Thomas Huth
2019-08-13 12:51   ` [Qemu-devel] " Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 2/6] s390x/tcg: Rework MMU selection for instruction fetches David Hildenbrand
2019-08-12 13:37   ` David Hildenbrand
2019-08-13 12:52     ` Cornelia Huck
2019-08-13 12:53       ` David Hildenbrand
2019-08-13 13:16   ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 3/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE David Hildenbrand
2019-08-13 13:42   ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 4/6] s390x/mmu: Trace the right value if setting/getting the storage key fails David Hildenbrand
2019-08-12 13:01   ` Cornelia Huck
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 5/6] s390x/mmu: Better storage key reference and change bit handling David Hildenbrand
2019-08-13 14:54   ` Cornelia Huck
2019-08-14  7:20     ` [Qemu-devel] [qemu-s390x] " David Hildenbrand
2019-08-12 11:27 ` [Qemu-devel] [PATCH-for-4.2 v1 6/6] s390x/mmu: Factor out storage key handling David Hildenbrand
2019-08-13 15:04   ` Cornelia Huck

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