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* [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ
@ 2019-08-13 16:44 Cédric Le Goater
  2019-08-13 16:46 ` Peter Maydell
  0 siblings, 1 reply; 4+ messages in thread
From: Cédric Le Goater @ 2019-08-13 16:44 UTC (permalink / raw)
  To: David Gibson
  Cc: Peter Maydell, Satheesh Rajendran, qemu-ppc, qemu-devel,
	Cédric Le Goater

If an IRQ is allocated and not configured, such as a MSI requested by
a PCI driver, it can be saved in its default state and possibly later
on restored using the same state. If not initially MASKED, KVM will
try to find a matching priority/target tuple for the interrupt and
fail to restore the VM because 0/0 is not a valid target.

When allocating a IRQ number, the EAS should be set to a sane default :
VALID and MASKED.

Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---

 David, this fixes a "virsh save/restore" issue in certain configurations
 of CPU topology which never showed up before :/

 Peter, I was busy on a KVM/passthru issue and lacked the time to
 investigate all ... you decide.

 hw/intc/spapr_xive.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 3ae311d9ff7f..1f9c624df13d 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -534,7 +534,10 @@ bool spapr_xive_irq_claim(SpaprXive *xive, uint32_t lisn, bool lsi)
         return false;
     }
 
-    xive->eat[lisn].w |= cpu_to_be64(EAS_VALID);
+    /*
+     * Set default values when allocating an IRQ number
+     */
+    xive->eat[lisn].w |= cpu_to_be64(EAS_VALID | EAS_MASKED);
     if (lsi) {
         xive_source_irq_set_lsi(xsrc, lisn);
     }
-- 
2.21.0



^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ
  2019-08-13 16:44 [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ Cédric Le Goater
@ 2019-08-13 16:46 ` Peter Maydell
  2019-08-13 16:48   ` Cédric Le Goater
  2019-08-14  2:36   ` David Gibson
  0 siblings, 2 replies; 4+ messages in thread
From: Peter Maydell @ 2019-08-13 16:46 UTC (permalink / raw)
  To: Cédric Le Goater
  Cc: Satheesh Rajendran, qemu-ppc, QEMU Developers, David Gibson

On Tue, 13 Aug 2019 at 17:44, Cédric Le Goater <clg@kaod.org> wrote:
>
> If an IRQ is allocated and not configured, such as a MSI requested by
> a PCI driver, it can be saved in its default state and possibly later
> on restored using the same state. If not initially MASKED, KVM will
> try to find a matching priority/target tuple for the interrupt and
> fail to restore the VM because 0/0 is not a valid target.
>
> When allocating a IRQ number, the EAS should be set to a sane default :
> VALID and MASKED.
>
> Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>
>  David, this fixes a "virsh save/restore" issue in certain configurations
>  of CPU topology which never showed up before :/
>
>  Peter, I was busy on a KVM/passthru issue and lacked the time to
>  investigate all ... you decide.

rc5 has been tagged so this is definitely too late for 4.1.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ
  2019-08-13 16:46 ` Peter Maydell
@ 2019-08-13 16:48   ` Cédric Le Goater
  2019-08-14  2:36   ` David Gibson
  1 sibling, 0 replies; 4+ messages in thread
From: Cédric Le Goater @ 2019-08-13 16:48 UTC (permalink / raw)
  To: Peter Maydell; +Cc: Satheesh Rajendran, qemu-ppc, QEMU Developers, David Gibson

On 13/08/2019 18:46, Peter Maydell wrote:
> On Tue, 13 Aug 2019 at 17:44, Cédric Le Goater <clg@kaod.org> wrote:
>>
>> If an IRQ is allocated and not configured, such as a MSI requested by
>> a PCI driver, it can be saved in its default state and possibly later
>> on restored using the same state. If not initially MASKED, KVM will
>> try to find a matching priority/target tuple for the interrupt and
>> fail to restore the VM because 0/0 is not a valid target.
>>
>> When allocating a IRQ number, the EAS should be set to a sane default :
>> VALID and MASKED.
>>
>> Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>
>>  David, this fixes a "virsh save/restore" issue in certain configurations
>>  of CPU topology which never showed up before :/
>>
>>  Peter, I was busy on a KVM/passthru issue and lacked the time to
>>  investigate all ... you decide.
> 
> rc5 has been tagged so this is definitely too late for 4.1.

This is nothing too invasive which will be difficult to backport.

Thanks,

C. 


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ
  2019-08-13 16:46 ` Peter Maydell
  2019-08-13 16:48   ` Cédric Le Goater
@ 2019-08-14  2:36   ` David Gibson
  1 sibling, 0 replies; 4+ messages in thread
From: David Gibson @ 2019-08-14  2:36 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Satheesh Rajendran, qemu-ppc, Cédric Le Goater, QEMU Developers

[-- Attachment #1: Type: text/plain, Size: 1376 bytes --]

On Tue, Aug 13, 2019 at 05:46:04PM +0100, Peter Maydell wrote:
> On Tue, 13 Aug 2019 at 17:44, Cédric Le Goater <clg@kaod.org> wrote:
> >
> > If an IRQ is allocated and not configured, such as a MSI requested by
> > a PCI driver, it can be saved in its default state and possibly later
> > on restored using the same state. If not initially MASKED, KVM will
> > try to find a matching priority/target tuple for the interrupt and
> > fail to restore the VM because 0/0 is not a valid target.
> >
> > When allocating a IRQ number, the EAS should be set to a sane default :
> > VALID and MASKED.
> >
> > Reported-by: Satheesh Rajendran <sathnaga@linux.vnet.ibm.com>
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
> > ---
> >
> >  David, this fixes a "virsh save/restore" issue in certain configurations
> >  of CPU topology which never showed up before :/
> >
> >  Peter, I was busy on a KVM/passthru issue and lacked the time to
> >  investigate all ... you decide.
> 
> rc5 has been tagged so this is definitely too late for 4.1.

Understood.  It's unfortunate, but I've merged this for 4.2, and I'll
look into stable branch and downstream backports.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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^ permalink raw reply	[flat|nested] 4+ messages in thread

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2019-08-13 16:44 [Qemu-devel] [PATCH] spapr/xive: Mask the EAS when allocating an IRQ Cédric Le Goater
2019-08-13 16:46 ` Peter Maydell
2019-08-13 16:48   ` Cédric Le Goater
2019-08-14  2:36   ` David Gibson

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