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Tue, 20 Aug 2019 05:59:09 -0700 Received: from xsj-pvapsmtp01 (mailman.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id x7KCx9Hl032457; Tue, 20 Aug 2019 05:59:09 -0700 Received: from [10.71.117.108] (helo=localhost) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1i03jA-0004UP-RH; Tue, 20 Aug 2019 05:59:09 -0700 Date: Tue, 20 Aug 2019 14:59:08 +0200 From: "Edgar E. Iglesias" To: Peter Maydell Message-ID: <20190820125908.GQ17732@toto> References: <20190816125802.25877-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(7916004)(4636009)(376002)(346002)(136003)(396003)(39860400002)(2980300002)(199004)(189003)(9786002)(106002)(70206006)(76506006)(33656002)(76176011)(70586007)(478600001)(1076003)(9686003)(5660300002)(6246003)(54906003)(26005)(47776003)(50466002)(58126008)(8676002)(81166006)(486006)(305945005)(23726003)(336012)(6916009)(81156014)(316002)(33716001)(126002)(356004)(4326008)(16586007)(476003)(11346002)(57986006)(186003)(63266004)(14444005)(8936002)(446003)(2906002)(229853002)(426003); DIR:OUT; SFP:1101; SCL:1; SRVR:BN7PR02MB5299; H:xsj-pvapsmtpgw01; FPR:; SPF:Pass; LANG:en; PTR:unknown-60-83.xilinx.com; A:1; MX:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4ea83ea3-4fef-427b-21d2-08d7256e34b2 X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600148)(711020)(4605104)(4709080)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328); SRVR:BN7PR02MB5299; X-MS-TrafficTypeDiagnostic: BN7PR02MB5299: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-Forefront-PRVS: 013568035E X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: g26IG7ZZAqDSE61MYrWw8p+BEv5PhCLmENePJ75MoHOoH1JJUwORGb/fWQMTMiVuKiZ3LuUJkQ1G9PiuljC5+IY86ggusHsIQz6wCMh8JC/ZeAhwOh3SdW5xVuhbcKLUUCYX1iNQbhIocHmFPmveht0pCkGaIJ3sXz60vdOQWJRKjn79Zwq1zVdVSIpBAlIRbntvvR2RI3aZ2esx513HMNiDaXXkZxWEnaeQCqsviwW8Yje3OpZiKI2SLJxyP0tjeNHOhUap+ySM7pI15e0rkIoVGJWqCGj18aCZRKOhPQQVOdCSrae6LrEi4levJCOORUr2arxZSOI+QodpMO7YbgiVW0HhrJXhqXnU8nmbHYg1i4fWkVEIPwZ3RW/11Uvj0GzDqN500bkyHHWaDGKp99xSHQcOYdk9UH5w3mM2h+c= X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2019 12:59:15.4051 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ea83ea3-4fef-427b-21d2-08d7256e34b2 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR02MB5299 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 40.107.80.72 Subject: Re: [Qemu-devel] [PATCH 0/2] target/arm: Take exceptions on ATS instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anthony PERARD , qemu-arm , Stefano Stabellini , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Aug 19, 2019 at 01:44:37PM +0100, Peter Maydell wrote: > On Fri, 16 Aug 2019 at 13:58, Peter Maydell wrote: > > > > The translation table walk for an ATS instruction can result in > > various faults. In general these are just reported back via the > > PAR_EL1 fault status fields, but in some cases the architecture > > requires that the fault is turned into an exception: > > * synchronous stage 2 faults of any kind during AT S1E0* and > > AT S1E1* instructions executed from NS EL1 fault to EL2 or EL3 > > * synchronous external aborts are taken as Data Abort exceptions > > > > (This is documented in the v8A Arm ARM DDI0487A.e D5.2.11 and G5.13.4.) > > > > I noticed this by code inspection back last year sometime when > > I was investigating a guest boot failure that turned out to be > > due to an entirely different cause. I got about halfway through > > trying to code up a fix before I realised it was irrelevant to > > that bug. This patchset is just tidying up and completing that > > work so it doesn't get lost. > > > > Use of ATS insns in the cases where they might actually fault > > is quite rare (obviously nobody sets up page tables where there's > > no memory and they'll take external aborts, and even for the > > "take a hyp trap for a stage 2 fault" case you need a setup > > with a hypervisor and a guest that uses ATS insns, and Linux as > > a guest doesn't use ATS at all. So my testing of this patchset > > has been more "check it doesn't break things" rather than > > actively finding and testing a use of the throw-an-exception path... > > I'm told that Xen for Arm makes more active use of ATS > instructions, so I've cc'd a few Xen people -- do any > of you have handy testing setups to try running Xen in > emulation under QEMU? Configs where the guest (EL1) actually > uses ATS instructions are the particularly interesting point > for this patchset. > > (if there's a good set of instructions for creating a test > image I could probably add it to the ad-hoc set of things > I sometimes test with.) Hi, All tests passed. Tested-by: Edgar E. Iglesias Cheers, Edgar